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Diffstat (limited to 'target/linux/mediatek/patches-4.14/0167-mtd-nand-mtk-Support-MT7622-NAND-flash-controller.patch')
-rw-r--r--target/linux/mediatek/patches-4.14/0167-mtd-nand-mtk-Support-MT7622-NAND-flash-controller.patch116
1 files changed, 116 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.14/0167-mtd-nand-mtk-Support-MT7622-NAND-flash-controller.patch b/target/linux/mediatek/patches-4.14/0167-mtd-nand-mtk-Support-MT7622-NAND-flash-controller.patch
new file mode 100644
index 0000000000..d7550ee7e8
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0167-mtd-nand-mtk-Support-MT7622-NAND-flash-controller.patch
@@ -0,0 +1,116 @@
+From f395a149fbbc190afbadbdcf9ce95f85f78da22f Mon Sep 17 00:00:00 2001
+From: RogerCC Lin <rogercc.lin@mediatek.com>
+Date: Thu, 30 Nov 2017 22:10:45 +0800
+Subject: [PATCH 167/224] mtd: nand: mtk: Support MT7622 NAND flash controller.
+
+Add tables to support MT7622 NAND flash controller.
+
+Signed-off-by: RogerCC Lin <rogercc.lin@mediatek.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+---
+ drivers/mtd/nand/mtk_ecc.c | 26 ++++++++++++++++++++++++++
+ drivers/mtd/nand/mtk_nand.c | 16 ++++++++++++++++
+ 2 files changed, 42 insertions(+)
+
+diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
+index 6610eefaa92b..40d86a861a70 100644
+--- a/drivers/mtd/nand/mtk_ecc.c
++++ b/drivers/mtd/nand/mtk_ecc.c
+@@ -83,6 +83,10 @@ static const u8 ecc_strength_mt2712[] = {
+ 40, 44, 48, 52, 56, 60, 68, 72, 80
+ };
+
++static const u8 ecc_strength_mt7622[] = {
++ 4, 6, 8, 10, 12, 14, 16
++};
++
+ enum mtk_ecc_regs {
+ ECC_ENCPAR00,
+ ECC_ENCIRQ_EN,
+@@ -110,6 +114,15 @@ static int mt2712_ecc_regs[] = {
+ [ECC_DECIRQ_STA] = 0x204,
+ };
+
++static int mt7622_ecc_regs[] = {
++ [ECC_ENCPAR00] = 0x10,
++ [ECC_ENCIRQ_EN] = 0x30,
++ [ECC_ENCIRQ_STA] = 0x34,
++ [ECC_DECDONE] = 0x11c,
++ [ECC_DECIRQ_EN] = 0x140,
++ [ECC_DECIRQ_STA] = 0x144,
++};
++
+ static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc,
+ enum mtk_ecc_operation op)
+ {
+@@ -458,6 +471,16 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = {
+ .pg_irq_sel = 1,
+ };
+
++static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = {
++ .err_mask = 0x3f,
++ .ecc_strength = ecc_strength_mt7622,
++ .ecc_regs = mt7622_ecc_regs,
++ .num_ecc_strength = 7,
++ .ecc_mode_shift = 4,
++ .parity_bits = 13,
++ .pg_irq_sel = 0,
++};
++
+ static const struct of_device_id mtk_ecc_dt_match[] = {
+ {
+ .compatible = "mediatek,mt2701-ecc",
+@@ -465,6 +488,9 @@ static const struct of_device_id mtk_ecc_dt_match[] = {
+ }, {
+ .compatible = "mediatek,mt2712-ecc",
+ .data = &mtk_ecc_caps_mt2712,
++ }, {
++ .compatible = "mediatek,mt7622-ecc",
++ .data = &mtk_ecc_caps_mt7622,
+ },
+ {},
+ };
+diff --git a/drivers/mtd/nand/mtk_nand.c b/drivers/mtd/nand/mtk_nand.c
+index 7349aa846f9a..8f71b405d639 100644
+--- a/drivers/mtd/nand/mtk_nand.c
++++ b/drivers/mtd/nand/mtk_nand.c
+@@ -174,6 +174,10 @@ static const u8 spare_size_mt2712[] = {
+ 74
+ };
+
++static const u8 spare_size_mt7622[] = {
++ 16, 26, 27, 28
++};
++
+ static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand)
+ {
+ return container_of(nand, struct mtk_nfc_nand_chip, nand);
+@@ -1409,6 +1413,15 @@ static const struct mtk_nfc_caps mtk_nfc_caps_mt2712 = {
+ .max_sector_size = 1024,
+ };
+
++static const struct mtk_nfc_caps mtk_nfc_caps_mt7622 = {
++ .spare_size = spare_size_mt7622,
++ .num_spare_size = 4,
++ .pageformat_spare_shift = 4,
++ .nfi_clk_div = 1,
++ .max_sector = 8,
++ .max_sector_size = 512,
++};
++
+ static const struct of_device_id mtk_nfc_id_table[] = {
+ {
+ .compatible = "mediatek,mt2701-nfc",
+@@ -1416,6 +1429,9 @@ static const struct of_device_id mtk_nfc_id_table[] = {
+ }, {
+ .compatible = "mediatek,mt2712-nfc",
+ .data = &mtk_nfc_caps_mt2712,
++ }, {
++ .compatible = "mediatek,mt7622-nfc",
++ .data = &mtk_nfc_caps_mt7622,
+ },
+ {}
+ };
+--
+2.11.0
+