diff options
Diffstat (limited to 'target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch')
| -rw-r--r-- | target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch b/target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch new file mode 100644 index 0000000000..640c9b39c7 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.24/1313-S3C24xx-NAND-allow-for-faster-timings.patch @@ -0,0 +1,71 @@ +From 54524f4531c8b262431b794fea610d81bb351c86 Mon Sep 17 00:00:00 2001 +From: Harald Welte <laforge@openmoko.org> +Date: Tue, 21 Oct 2008 08:17:07 +0100 +Subject: [PATCH] S3C24xx NAND: allow for faster timings + +Tacls can actually be zero with some NAND flash devices, so we need +to permit this. + +Also, the TACLS register actually specifies the actual number of +HCLK clocks, where the TWRPH0 and TWRPH1 registers are auto-incremented +by one HCLK clock in hardware. + +Signed-off-by: Harald Welte <laforge@openmoko.org> +--- + drivers/mtd/nand/s3c2410.c | 13 +++++++------ + 1 files changed, 7 insertions(+), 6 deletions(-) + +diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c +index 4413d76..eeb48ed 100644 +--- a/drivers/mtd/nand/s3c2410.c ++++ b/drivers/mtd/nand/s3c2410.c +@@ -158,6 +158,10 @@ static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) + { + int result; + ++ /* Tacls can be 0ns in some cases */ ++ if (wanted == 0) ++ return 0; ++ + result = (wanted * clk) / NS_IN_KHZ; + result++; + +@@ -168,9 +172,6 @@ static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) + return -1; + } + +- if (result < 1) +- result = 1; +- + return result; + } + +@@ -202,7 +203,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, + twrph1 = 8; + } + +- if (tacls < 0 || twrph0 < 0 || twrph1 < 0) { ++ if (tacls < 0 || twrph0 < 1 || twrph1 < 1) { + dev_err(info->device, "cannot get suitable timings\n"); + return -EINVAL; + } +@@ -213,14 +214,14 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, + switch (info->cpu_type) { + case TYPE_S3C2410: + cfg = S3C2410_NFCONF_EN; +- cfg |= S3C2410_NFCONF_TACLS(tacls - 1); ++ cfg |= S3C2410_NFCONF_TACLS(tacls); + cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); + cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); + break; + + case TYPE_S3C2440: + case TYPE_S3C2412: +- cfg = S3C2440_NFCONF_TACLS(tacls - 1); ++ cfg = S3C2440_NFCONF_TACLS(tacls); + cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); + cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); + +-- +1.5.6.5 + |