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path: root/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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* ar71xx: fix ethernet PLL configuration for QCA956xFelix Fietkau2017-02-171-1/+1
* ar71xx: QCA956X: add missing registerHenryk Heisig2017-01-261-1/+22
* ar71xx: disable flow control to the built-in switch on AR934xFelix Fietkau2016-08-251-1/+0
* ar71xx: disable pdata->use_flow_control for QCA9558Felix Fietkau2016-06-271-1/+0
* ar71xx: rename ethernet pdata->builtin_switch to use_flow_controlFelix Fietkau2016-06-271-6/+6
* ar71xx: enable flow control for ethernet MACs with built-in switchFelix Fietkau2016-06-261-0/+6
* ar71xx: fix DDR write buffer flushing issues with 4.4Felix Fietkau2016-05-151-73/+16
* Revert "ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg"John Crispin2016-03-231-13/+3
* Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x"John Crispin2016-03-231-11/+1
* ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955xJohn Crispin2016-03-161-1/+11
* ar71xx: Clear bits in ath79_setup_qca955x_eth_cfgJohn Crispin2016-03-161-3/+13
* ar71xx: fix qca956x ethernet initializationFelix Fietkau2016-03-071-3/+18
* ar71xx: fix MDIO bus probe on QCA956xFelix Fietkau2016-02-071-1/+2
* ar71xx: fold patch 622-MIPS-ath79-add-support-for-QCA956x-ethernet.patch into...Felix Fietkau2016-02-071-11/+56
* ath79: dev-eth: fix QCA9561 set phy interface mode and maskJohn Crispin2015-09-161-2/+7
* ar71xx: rework patch for qca953x/956xFelix Fietkau2015-07-071-2/+16
* ar71xx: add a helper function to set RXDV/RXD of ETH_CFG on AR934xFelix Fietkau2015-04-201-0/+26
* ar71xx: dev-eth: replace mdelay callsJohn Crispin2014-12-071-2/+2
* ath79: dev-eth: Don't advertise 1gbit in link code word on ar9331Felix Fietkau2014-09-071-1/+1
* ar71xx: add a helper function for setting up ETH_CFG register on QCA955xGabor Juhos2014-07-131-0/+18
* ar71xx: add support for QCA953x SoCFelix Fietkau2014-04-071-0/+40
* ar71xx: fix max frame length of the QCA955x SoCsGabor Juhos2013-12-231-0/+11
* ar71xx: don't set builtin_switch flag for QCA9558Gabor Juhos2013-12-231-6/+1
* ar71xx: allow to use large ethernet frames on AR934x SoCsGabor Juhos2013-12-201-0/+4
* ar71xx: ag71xx: get max_frame_len and desc_pktlen_mask from platform dataGabor Juhos2013-12-201-0/+3
* ar71xx: make ag71xx_mdio_platform_data visibleGabor Juhos2013-12-171-2/+2
* ar71xx: rename ath79_parse_mac_addr to ath79_parse_ascii_macGabor Juhos2013-09-201-11/+18
* ar71xx: use backported QCA955x patchesGabor Juhos2013-03-041-4/+4
* ar71xx: fix ethernet device registration for the QCA9556 SoCGabor Juhos2013-01-291-0/+12
* ar71xx: fix ethernet device registration for QCA9558Gabor Juhos2012-12-221-1/+43
* ar71xx: fixup allowed PHY interface types for QCA9558Gabor Juhos2012-12-221-2/+23
* ar71xx: don't assign any MII bus device on QCA9558 by defaultGabor Juhos2012-12-221-1/+4
* ar71xx: add a helper function for setting up ETH_CFG register on AR934xGabor Juhos2012-10-171-0/+24
* ar71xx: avoid possible NULL pointer dereference in ath79_init_{,local}_macGabor Juhos2012-09-271-2/+8
* ar71xx: use dynamic clock dividers on the 2nd MDIO of AR934xGabor Juhos2012-09-091-0/+33
* Revert "ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240"Gabor Juhos2012-08-291-8/+1
* ar71xx: only allow RGMII mode on the 2nd ethernet MAC of the AR7240Gabor Juhos2012-08-271-1/+8
* ar71xx: add initial support for the QCA955X SoCsGabor Juhos2012-07-051-1/+9
* ar71xx: add a helper function for setting up PHY4 swapping on ar933xFelix Fietkau2012-06-061-0/+18
* ar71xx: fix MII clock settings for various chips, improves ethernet stability...Felix Fietkau2012-05-271-2/+10
* ar71xx: allow to disable link polling on unused PHYsGabor Juhos2012-04-291-0/+4
* ar71xx: add AR934x specific interface speed setup for ge0Gabor Juhos2012-03-191-4/+9
* ar71xx: reset the switch on AR934x before ethernet device registrationGabor Juhos2012-03-131-0/+4
* ar71xx: use a dummy callback for interfaces with fixed speedGabor Juhos2012-03-121-28/+7
* ar71xx: merge ar934x_bo_ddr_flush patchGabor Juhos2012-03-121-12/+5
* ar71xx: merge files-3.2 to filesGabor Juhos2012-02-101-0/+971
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