| Commit message (Collapse) | Author | Age | Files | Lines |
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This renames lantiq DTS(I) files to follow soc_vendor_device scheme.
This will make DTS files easier to maintain.
As a side effect, DTS file name can be derived from device node
names now, only having to specify a SOC variable in Makefiles.
While at it, move files to arch/mips/boot/dts/lantiq subfolder.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Assign the PCI pins to the PCI controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Assign the STP pins to the STP GPIO controller node instead of using
pin hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Assign the NAND pins to the NAND controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
While here, define all NAND pins (CLE, ALE, read/RD, ready busy/RDY and
CE/CS1). This means that the pinctrl subsystem knows that these pins are
in use and cannot be re-assigned as GPIOs for example.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Define the SPI pins in the corresponding SoCs.dtsi and assign them to
the SPI controller node. All known boards use CS4 and it's likely that
this is hardcoded in bootrom so this doesn't bother with having
per-board SPI pinmux settings.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Assign the MDIO pins to the switch node instead of using pin hogging
(where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
This converts amazonse, ar9 and vr9. danube is skipped because the pin
controller doesn't define a pinmux for the MDIO pins (some of the SoC
pads may be hardwired to the MDIO pins instead of being configurable).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Add size and address cells where missing to fix the following devicetree
compiler warning:
Warning (avoid_default_addr_size): Relying on default #address-cells value
Warning (avoid_default_addr_size): Relying on default #size-cells value
Signed-off-by: Mathias Kresin <dev@kresin.me>
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SPI nodes only need an address and no size. Drop the size everywhere.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The cpu temperature driver has the register offset hardcode and doesn't
need a reg.
The mdio bus node is only used as a well known name and doesn't need a
reg or unit address.
syscon-reboot doesn't have a unit address or a reg either. The unit name
collides with reset-controller@10 anyway.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Add the reg property if the node has an unit address. Fixes the
following device tree compiler warning:
Warning (unit_address_vs_reg): node has a unit name, but no reg property
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The memory node is highly board specific and should be only defined in
the board dts.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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This just copies the files from the kernel 4.14 specific folders into
the kernel 4.19 specific folder, no changes are done to the files in
this commit.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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