blob: 0e8d885da6cac6c417bd8bd48abf13a9177a406b (
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--- a/ath/if_ath.c
+++ b/ath/if_ath.c
@@ -2308,6 +2308,17 @@ ath_intr(int irq, void *dev_id, struct p
sc->sc_isr = status;
status &= sc->sc_imask; /* discard unasked for bits */
+
+ /* Treat RXORN as non-fatal. Either the bus is busy or the CPU
+ * is not fast enough to process all frames. Treat it like
+ * an Rx interrupt
+ */
+ if (status & HAL_INT_RXORN) {
+ sc->sc_stats.ast_rxorn++;
+ status &= ~HAL_INT_RXORN;
+ status |= HAL_INT_RX;
+ }
+
/* As soon as we know we have a real interrupt we intend to service,
* we will check to see if we need an initial hardware TSF reading.
* Normally we would just populate this all the time to keep things
@@ -2320,10 +2331,6 @@ ath_intr(int irq, void *dev_id, struct p
sc->sc_stats.ast_hardware++;
ath_hal_intrset(ah, 0); /* disable intr's until reset */
ATH_SCHEDULE_TQUEUE(&sc->sc_fataltq, &needmark);
- } else if (status & HAL_INT_RXORN) {
- sc->sc_stats.ast_rxorn++;
- ath_hal_intrset(ah, 0); /* disable intr's until reset */
- ATH_SCHEDULE_TQUEUE(&sc->sc_rxorntq, &needmark);
} else {
if (status & HAL_INT_SWBA) {
struct ieee80211vap * vap;
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