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Content-Disposition: inline; filename="075-v5.13-0001-net-dsa-bcm_sf2-store-PHY-interface-mode-in-port-str.patch"
Last-Modified: Fri, 19 Jul 2024 20:17:28 GMT
Expires: Mon, 17 Jul 2034 20:17:28 GMT
ETag: "e9a0b2c79d33c566870fe6f6f43cccef900c3ce6"

From 01488a0ccd9abe15565bed50a45afcddbb0fe199 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Mar 2021 11:41:07 +0100
Subject: [PATCH] net: dsa: bcm_sf2: store PHY interface/mode in port structure
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It's needed later for proper switch / crossbar setup.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
 drivers/net/dsa/bcm_sf2.c | 16 ++++++++++++----
 drivers/net/dsa/bcm_sf2.h |  1 +
 2 files changed, 13 insertions(+), 4 deletions(-)

--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -385,8 +385,9 @@ static void bcm_sf2_intr_disable(struct
 static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv,
 				   struct device_node *dn)
 {
+	struct device *dev = priv->dev->ds->dev;
+	struct bcm_sf2_port_status *port_st;
 	struct device_node *port;
-	int mode;
 	unsigned int port_num;
 
 	priv->moca_port = -1;
@@ -395,19 +396,26 @@ static void bcm_sf2_identify_ports(struc
 		if (of_property_read_u32(port, "reg", &port_num))
 			continue;
 
+		if (port_num >= DSA_MAX_PORTS) {
+			dev_err(dev, "Invalid port number %d\n", port_num);
+			continue;
+		}
+
+		port_st = &priv->port_sts[port_num];
+
 		/* Internal PHYs get assigned a specific 'phy-mode' property
 		 * value: "internal" to help flag them before MDIO probing
 		 * has completed, since they might be turned off at that
 		 * time
 		 */
-		mode = of_get_phy_mode(port);
-		if (mode < 0)
+		port_st->mode = of_get_phy_mode(port);
+		if (port_st->mode < 0)
 			continue;
 
-		if (mode == PHY_INTERFACE_MODE_INTERNAL)
+		if (port_st->mode == PHY_INTERFACE_MODE_INTERNAL)
 			priv->int_phy_mask |= 1 << port_num;
 
-		if (mode == PHY_INTERFACE_MODE_MOCA)
+		if (port_st->mode == PHY_INTERFACE_MODE_MOCA)
 			priv->moca_port = port_num;
 
 		if (of_property_read_bool(port, "brcm,use-bcm-hdr"))
--- a/drivers/net/dsa/bcm_sf2.h
+++ b/drivers/net/dsa/bcm_sf2.h
@@ -43,6 +43,7 @@ struct bcm_sf2_hw_params {
 #define BCM_SF2_REGS_NUM	6
 
 struct bcm_sf2_port_status {
+	int mode;
 	unsigned int link;
 };
 
4908enet-add-BCM4908-controller-driv.patch?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>tree</a><a href='/cgit/openwrt/upstream/commit/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>commit</a><a href='/cgit/openwrt/upstream/diff/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>diff</a><a href='/cgit/openwrt/upstream/stats/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch'>stats</a></td><td class='form'><form class='right' method='get' action='/cgit/openwrt/upstream/log/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch'>
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<div class='path'>path: <a href='/cgit/openwrt/upstream/tree/?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>root</a>/<a href='/cgit/openwrt/upstream/tree/target?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>target</a>/<a href='/cgit/openwrt/upstream/tree/target/linux?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>linux</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/bcm4908?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>bcm4908</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/bcm4908/patches-5.4?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>patches-5.4</a>/<a href='/cgit/openwrt/upstream/tree/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch</a></div><div class='content'>blob: adef3d87acf44d7d7f74d886425c227ee223a1e5 (<a href='/cgit/openwrt/upstream/plain/target/linux/bcm4908/patches-5.4/072-v5.12-0002-net-broadcom-bcm4908enet-add-BCM4908-controller-driv.patch?id=8f89b1ab0fef81c85925c88e99a557e91e575aa3'>plain</a>)
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<a id='n310' href='#n310'>310</a>
<a id='n311' href='#n311'>311</a>
<a id='n312' href='#n312'>312</a>
<a id='n313' href='#n313'>313</a>
<a id='n314' href='#n314'>314</a>
<a id='n315' href='#n315'>315</a>
<a id='n316' href='#n316'>316</a>
<a id='n317' href='#n317'>317</a>
<a id='n318' href='#n318'>318</a>
<a id='n319' href='#n319'>319</a>
<a id='n320' href='#n320'>320</a>
<a id='n321' href='#n321'>321</a>
<a id='n322' href='#n322'>322</a>
<a id='n323' href='#n323'>323</a>
<a id='n324' href='#n324'>324</a>
<a id='n325' href='#n325'>325</a>
<a id='n326' href='#n326'>326</a>
<a id='n327' href='#n327'>327</a>
<a id='n328' href='#n328'>328</a>
<a id='n329' href='#n329'>329</a>
<a id='n330' href='#n330'>330</a>
<a id='n331' href='#n331'>331</a>
<a id='n332' href='#n332'>332</a>
<a id='n333' href='#n333'>333</a>
<a id='n334' href='#n334'>334</a>
<a id='n335' href='#n335'>335</a>
<a id='n336' href='#n336'>336</a>
<a id='n337' href='#n337'>337</a>
<a id='n338' href='#n338'>338</a>
<a id='n339' href='#n339'>339</a>
<a id='n340' href='#n340'>340</a>
<a id='n341' href='#n341'>341</a>
<a id='n342' href='#n342'>342</a>
<a id='n343' href='#n343'>343</a>
<a id='n344' href='#n344'>344</a>
<a id='n345' href='#n345'>345</a>
<a id='n346' href='#n346'>346</a>
<a id='n347' href='#n347'>347</a>
<a id='n348' href='#n348'>348</a>
<a id='n349' href='#n349'>349</a>
<a id='n350' href='#n350'>350</a>
<a id='n351' href='#n351'>351</a>
<a id='n352' href='#n352'>352</a>
<a id='n353' href='#n353'>353</a>
<a id='n354' href='#n354'>354</a>
<a id='n355' href='#n355'>355</a>
<a id='n356' href='#n356'>356</a>
<a id='n357' href='#n357'>357</a>
<a id='n358' href='#n358'>358</a>
<a id='n359' href='#n359'>359</a>
<a id='n360' href='#n360'>360</a>
<a id='n361' href='#n361'>361</a>
<a id='n362' href='#n362'>362</a>
<a id='n363' href='#n363'>363</a>
<a id='n364' href='#n364'>364</a>
<a id='n365' href='#n365'>365</a>
<a id='n366' href='#n366'>366</a>
<a id='n367' href='#n367'>367</a>
<a id='n368' href='#n368'>368</a>
<a id='n369' href='#n369'>369</a>
<a id='n370' href='#n370'>370</a>
<a id='n371' href='#n371'>371</a>
<a id='n372' href='#n372'>372</a>
<a id='n373' href='#n373'>373</a>
<a id='n374' href='#n374'>374</a>
<a id='n375' href='#n375'>375</a>
<a id='n376' href='#n376'>376</a>
<a id='n377' href='#n377'>377</a>
<a id='n378' href='#n378'>378</a>
<a id='n379' href='#n379'>379</a>
<a id='n380' href='#n380'>380</a>
<a id='n381' href='#n381'>381</a>
<a id='n382' href='#n382'>382</a>
<a id='n383' href='#n383'>383</a>
<a id='n384' href='#n384'>384</a>
<a id='n385' href='#n385'>385</a>
<a id='n386' href='#n386'>386</a>
<a id='n387' href='#n387'>387</a>
<a id='n388' href='#n388'>388</a>
<a id='n389' href='#n389'>389</a>
<a id='n390' href='#n390'>390</a>
<a id='n391' href='#n391'>391</a>
<a id='n392' href='#n392'>392</a>
<a id='n393' href='#n393'>393</a>
<a id='n394' href='#n394'>394</a>
<a id='n395' href='#n395'>395</a>
<a id='n396' href='#n396'>396</a>
<a id='n397' href='#n397'>397</a>
<a id='n398' href='#n398'>398</a>
<a id='n399' href='#n399'>399</a>
<a id='n400' href='#n400'>400</a>
<a id='n401' href='#n401'>401</a>
<a id='n402' href='#n402'>402</a>
<a id='n403' href='#n403'>403</a>
<a id='n404' href='#n404'>404</a>
<a id='n405' href='#n405'>405</a>
<a id='n406' href='#n406'>406</a>
<a id='n407' href='#n407'>407</a>
<a id='n408' href='#n408'>408</a>
<a id='n409' href='#n409'>409</a>
<a id='n410' href='#n410'>410</a>
<a id='n411' href='#n411'>411</a>
<a id='n412' href='#n412'>412</a>
<a id='n413' href='#n413'>413</a>
<a id='n414' href='#n414'>414</a>
<a id='n415' href='#n415'>415</a>
<a id='n416' href='#n416'>416</a>
<a id='n417' href='#n417'>417</a>
<a id='n418' href='#n418'>418</a>
<a id='n419' href='#n419'>419</a>
<a id='n420' href='#n420'>420</a>
<a id='n421' href='#n421'>421</a>
<a id='n422' href='#n422'>422</a>
<a id='n423' href='#n423'>423</a>
<a id='n424' href='#n424'>424</a>
<a id='n425' href='#n425'>425</a>
<a id='n426' href='#n426'>426</a>
<a id='n427' href='#n427'>427</a>
<a id='n428' href='#n428'>428</a>
<a id='n429' href='#n429'>429</a>
<a id='n430' href='#n430'>430</a>
<a id='n431' href='#n431'>431</a>
<a id='n432' href='#n432'>432</a>
<a id='n433' href='#n433'>433</a>
<a id='n434' href='#n434'>434</a>
<a id='n435' href='#n435'>435</a>
<a id='n436' href='#n436'>436</a>
<a id='n437' href='#n437'>437</a>
<a id='n438' href='#n438'>438</a>
<a id='n439' href='#n439'>439</a>
<a id='n440' href='#n440'>440</a>
<a id='n441' href='#n441'>441</a>
<a id='n442' href='#n442'>442</a>
<a id='n443' href='#n443'>443</a>
<a id='n444' href='#n444'>444</a>
<a id='n445' href='#n445'>445</a>
<a id='n446' href='#n446'>446</a>
<a id='n447' href='#n447'>447</a>
<a id='n448' href='#n448'>448</a>
<a id='n449' href='#n449'>449</a>
<a id='n450' href='#n450'>450</a>
<a id='n451' href='#n451'>451</a>
<a id='n452' href='#n452'>452</a>
<a id='n453' href='#n453'>453</a>
<a id='n454' href='#n454'>454</a>
<a id='n455' href='#n455'>455</a>
<a id='n456' href='#n456'>456</a>
<a id='n457' href='#n457'>457</a>
<a id='n458' href='#n458'>458</a>
<a id='n459' href='#n459'>459</a>
<a id='n460' href='#n460'>460</a>
<a id='n461' href='#n461'>461</a>
<a id='n462' href='#n462'>462</a>
<a id='n463' href='#n463'>463</a>
<a id='n464' href='#n464'>464</a>
<a id='n465' href='#n465'>465</a>
<a id='n466' href='#n466'>466</a>
<a id='n467' href='#n467'>467</a>
<a id='n468' href='#n468'>468</a>
<a id='n469' href='#n469'>469</a>
<a id='n470' href='#n470'>470</a>
<a id='n471' href='#n471'>471</a>
<a id='n472' href='#n472'>472</a>
<a id='n473' href='#n473'>473</a>
<a id='n474' href='#n474'>474</a>
<a id='n475' href='#n475'>475</a>
<a id='n476' href='#n476'>476</a>
<a id='n477' href='#n477'>477</a>
<a id='n478' href='#n478'>478</a>
<a id='n479' href='#n479'>479</a>
<a id='n480' href='#n480'>480</a>
<a id='n481' href='#n481'>481</a>
<a id='n482' href='#n482'>482</a>
<a id='n483' href='#n483'>483</a>
<a id='n484' href='#n484'>484</a>
<a id='n485' href='#n485'>485</a>
<a id='n486' href='#n486'>486</a>
<a id='n487' href='#n487'>487</a>
<a id='n488' href='#n488'>488</a>
<a id='n489' href='#n489'>489</a>
<a id='n490' href='#n490'>490</a>
<a id='n491' href='#n491'>491</a>
<a id='n492' href='#n492'>492</a>
<a id='n493' href='#n493'>493</a>
<a id='n494' href='#n494'>494</a>
<a id='n495' href='#n495'>495</a>
<a id='n496' href='#n496'>496</a>
<a id='n497' href='#n497'>497</a>
<a id='n498' href='#n498'>498</a>
<a id='n499' href='#n499'>499</a>
<a id='n500' href='#n500'>500</a>
<a id='n501' href='#n501'>501</a>
<a id='n502' href='#n502'>502</a>
<a id='n503' href='#n503'>503</a>
<a id='n504' href='#n504'>504</a>
<a id='n505' href='#n505'>505</a>
<a id='n506' href='#n506'>506</a>
<a id='n507' href='#n507'>507</a>
<a id='n508' href='#n508'>508</a>
<a id='n509' href='#n509'>509</a>
<a id='n510' href='#n510'>510</a>
<a id='n511' href='#n511'>511</a>
<a id='n512' href='#n512'>512</a>
<a id='n513' href='#n513'>513</a>
<a id='n514' href='#n514'>514</a>
<a id='n515' href='#n515'>515</a>
<a id='n516' href='#n516'>516</a>
<a id='n517' href='#n517'>517</a>
<a id='n518' href='#n518'>518</a>
<a id='n519' href='#n519'>519</a>
<a id='n520' href='#n520'>520</a>
<a id='n521' href='#n521'>521</a>
<a id='n522' href='#n522'>522</a>
<a id='n523' href='#n523'>523</a>
<a id='n524' href='#n524'>524</a>
<a id='n525' href='#n525'>525</a>
<a id='n526' href='#n526'>526</a>
<a id='n527' href='#n527'>527</a>
<a id='n528' href='#n528'>528</a>
<a id='n529' href='#n529'>529</a>
<a id='n530' href='#n530'>530</a>
<a id='n531' href='#n531'>531</a>
<a id='n532' href='#n532'>532</a>
<a id='n533' href='#n533'>533</a>
<a id='n534' href='#n534'>534</a>
<a id='n535' href='#n535'>535</a>
<a id='n536' href='#n536'>536</a>
<a id='n537' href='#n537'>537</a>
<a id='n538' href='#n538'>538</a>
<a id='n539' href='#n539'>539</a>
<a id='n540' href='#n540'>540</a>
<a id='n541' href='#n541'>541</a>
<a id='n542' href='#n542'>542</a>
<a id='n543' href='#n543'>543</a>
<a id='n544' href='#n544'>544</a>
<a id='n545' href='#n545'>545</a>
<a id='n546' href='#n546'>546</a>
<a id='n547' href='#n547'>547</a>
<a id='n548' href='#n548'>548</a>
<a id='n549' href='#n549'>549</a>
<a id='n550' href='#n550'>550</a>
<a id='n551' href='#n551'>551</a>
<a id='n552' href='#n552'>552</a>
<a id='n553' href='#n553'>553</a>
<a id='n554' href='#n554'>554</a>
<a id='n555' href='#n555'>555</a>
<a id='n556' href='#n556'>556</a>
<a id='n557' href='#n557'>557</a>
<a id='n558' href='#n558'>558</a>
<a id='n559' href='#n559'>559</a>
<a id='n560' href='#n560'>560</a>
<a id='n561' href='#n561'>561</a>
<a id='n562' href='#n562'>562</a>
<a id='n563' href='#n563'>563</a>
<a id='n564' href='#n564'>564</a>
<a id='n565' href='#n565'>565</a>
<a id='n566' href='#n566'>566</a>
<a id='n567' href='#n567'>567</a>
<a id='n568' href='#n568'>568</a>
<a id='n569' href='#n569'>569</a>
<a id='n570' href='#n570'>570</a>
<a id='n571' href='#n571'>571</a>
<a id='n572' href='#n572'>572</a>
<a id='n573' href='#n573'>573</a>
<a id='n574' href='#n574'>574</a>
<a id='n575' href='#n575'>575</a>
<a id='n576' href='#n576'>576</a>
<a id='n577' href='#n577'>577</a>
<a id='n578' href='#n578'>578</a>
<a id='n579' href='#n579'>579</a>
<a id='n580' href='#n580'>580</a>
<a id='n581' href='#n581'>581</a>
<a id='n582' href='#n582'>582</a>
<a id='n583' href='#n583'>583</a>
<a id='n584' href='#n584'>584</a>
<a id='n585' href='#n585'>585</a>
<a id='n586' href='#n586'>586</a>
<a id='n587' href='#n587'>587</a>
<a id='n588' href='#n588'>588</a>
<a id='n589' href='#n589'>589</a>
<a id='n590' href='#n590'>590</a>
<a id='n591' href='#n591'>591</a>
<a id='n592' href='#n592'>592</a>
<a id='n593' href='#n593'>593</a>
<a id='n594' href='#n594'>594</a>
<a id='n595' href='#n595'>595</a>
<a id='n596' href='#n596'>596</a>
<a id='n597' href='#n597'>597</a>
<a id='n598' href='#n598'>598</a>
<a id='n599' href='#n599'>599</a>
<a id='n600' href='#n600'>600</a>
<a id='n601' href='#n601'>601</a>
<a id='n602' href='#n602'>602</a>
<a id='n603' href='#n603'>603</a>
<a id='n604' href='#n604'>604</a>
<a id='n605' href='#n605'>605</a>
<a id='n606' href='#n606'>606</a>
<a id='n607' href='#n607'>607</a>
<a id='n608' href='#n608'>608</a>
<a id='n609' href='#n609'>609</a>
<a id='n610' href='#n610'>610</a>
<a id='n611' href='#n611'>611</a>
<a id='n612' href='#n612'>612</a>
<a id='n613' href='#n613'>613</a>
<a id='n614' href='#n614'>614</a>
<a id='n615' href='#n615'>615</a>
<a id='n616' href='#n616'>616</a>
<a id='n617' href='#n617'>617</a>
<a id='n618' href='#n618'>618</a>
<a id='n619' href='#n619'>619</a>
<a id='n620' href='#n620'>620</a>
<a id='n621' href='#n621'>621</a>
<a id='n622' href='#n622'>622</a>
<a id='n623' href='#n623'>623</a>
<a id='n624' href='#n624'>624</a>
<a id='n625' href='#n625'>625</a>
<a id='n626' href='#n626'>626</a>
<a id='n627' href='#n627'>627</a>
<a id='n628' href='#n628'>628</a>
<a id='n629' href='#n629'>629</a>
<a id='n630' href='#n630'>630</a>
<a id='n631' href='#n631'>631</a>
<a id='n632' href='#n632'>632</a>
<a id='n633' href='#n633'>633</a>
<a id='n634' href='#n634'>634</a>
<a id='n635' href='#n635'>635</a>
<a id='n636' href='#n636'>636</a>
<a id='n637' href='#n637'>637</a>
<a id='n638' href='#n638'>638</a>
<a id='n639' href='#n639'>639</a>
<a id='n640' href='#n640'>640</a>
<a id='n641' href='#n641'>641</a>
<a id='n642' href='#n642'>642</a>
<a id='n643' href='#n643'>643</a>
<a id='n644' href='#n644'>644</a>
<a id='n645' href='#n645'>645</a>
<a id='n646' href='#n646'>646</a>
<a id='n647' href='#n647'>647</a>
<a id='n648' href='#n648'>648</a>
<a id='n649' href='#n649'>649</a>
<a id='n650' href='#n650'>650</a>
<a id='n651' href='#n651'>651</a>
<a id='n652' href='#n652'>652</a>
<a id='n653' href='#n653'>653</a>
<a id='n654' href='#n654'>654</a>
<a id='n655' href='#n655'>655</a>
<a id='n656' href='#n656'>656</a>
<a id='n657' href='#n657'>657</a>
<a id='n658' href='#n658'>658</a>
<a id='n659' href='#n659'>659</a>
<a id='n660' href='#n660'>660</a>
<a id='n661' href='#n661'>661</a>
<a id='n662' href='#n662'>662</a>
<a id='n663' href='#n663'>663</a>
<a id='n664' href='#n664'>664</a>
<a id='n665' href='#n665'>665</a>
<a id='n666' href='#n666'>666</a>
<a id='n667' href='#n667'>667</a>
<a id='n668' href='#n668'>668</a>
<a id='n669' href='#n669'>669</a>
<a id='n670' href='#n670'>670</a>
<a id='n671' href='#n671'>671</a>
<a id='n672' href='#n672'>672</a>
<a id='n673' href='#n673'>673</a>
<a id='n674' href='#n674'>674</a>
<a id='n675' href='#n675'>675</a>
<a id='n676' href='#n676'>676</a>
<a id='n677' href='#n677'>677</a>
<a id='n678' href='#n678'>678</a>
<a id='n679' href='#n679'>679</a>
<a id='n680' href='#n680'>680</a>
<a id='n681' href='#n681'>681</a>
<a id='n682' href='#n682'>682</a>
<a id='n683' href='#n683'>683</a>
<a id='n684' href='#n684'>684</a>
<a id='n685' href='#n685'>685</a>
<a id='n686' href='#n686'>686</a>
<a id='n687' href='#n687'>687</a>
<a id='n688' href='#n688'>688</a>
<a id='n689' href='#n689'>689</a>
<a id='n690' href='#n690'>690</a>
<a id='n691' href='#n691'>691</a>
<a id='n692' href='#n692'>692</a>
<a id='n693' href='#n693'>693</a>
<a id='n694' href='#n694'>694</a>
<a id='n695' href='#n695'>695</a>
<a id='n696' href='#n696'>696</a>
<a id='n697' href='#n697'>697</a>
<a id='n698' href='#n698'>698</a>
<a id='n699' href='#n699'>699</a>
<a id='n700' href='#n700'>700</a>
<a id='n701' href='#n701'>701</a>
<a id='n702' href='#n702'>702</a>
<a id='n703' href='#n703'>703</a>
<a id='n704' href='#n704'>704</a>
<a id='n705' href='#n705'>705</a>
<a id='n706' href='#n706'>706</a>
<a id='n707' href='#n707'>707</a>
<a id='n708' href='#n708'>708</a>
<a id='n709' href='#n709'>709</a>
<a id='n710' href='#n710'>710</a>
<a id='n711' href='#n711'>711</a>
<a id='n712' href='#n712'>712</a>
<a id='n713' href='#n713'>713</a>
<a id='n714' href='#n714'>714</a>
<a id='n715' href='#n715'>715</a>
<a id='n716' href='#n716'>716</a>
<a id='n717' href='#n717'>717</a>
<a id='n718' href='#n718'>718</a>
<a id='n719' href='#n719'>719</a>
<a id='n720' href='#n720'>720</a>
<a id='n721' href='#n721'>721</a>
<a id='n722' href='#n722'>722</a>
<a id='n723' href='#n723'>723</a>
<a id='n724' href='#n724'>724</a>
<a id='n725' href='#n725'>725</a>
<a id='n726' href='#n726'>726</a>
<a id='n727' href='#n727'>727</a>
<a id='n728' href='#n728'>728</a>
<a id='n729' href='#n729'>729</a>
<a id='n730' href='#n730'>730</a>
<a id='n731' href='#n731'>731</a>
<a id='n732' href='#n732'>732</a>
<a id='n733' href='#n733'>733</a>
<a id='n734' href='#n734'>734</a>
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.highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */</style><div class="highlight"><pre><span></span>From 4feffeadbcb2e5b11cbbf191a33c245b74a5837b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= &lt;rafal@milecki.pl&gt;
Date: Sun, 7 Feb 2021 23:26:32 +0100
Subject: [PATCH] net: broadcom: bcm4908enet: add BCM4908 controller driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

BCM4908 SoCs family uses Ethernel controller that includes UniMAC but
uses different DMA engine (than other controllers) and requires
<span class="gh">different programming.</span>

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
<span class="gd">---</span>
 MAINTAINERS                                 |   9 +
 drivers/net/ethernet/broadcom/Kconfig       |   8 +
 drivers/net/ethernet/broadcom/Makefile      |   1 +
 drivers/net/ethernet/broadcom/bcm4908enet.c | 676 ++++++++++++++++++++
 drivers/net/ethernet/broadcom/bcm4908enet.h |  96 +++
 5 files changed, 790 insertions(+)
 create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.c
 create mode 100644 drivers/net/ethernet/broadcom/bcm4908enet.h

<span class="gd">--- a/MAINTAINERS</span>
<span class="gi">+++ b/MAINTAINERS</span>
<span class="gu">@@ -3207,6 +3207,15 @@ F:	Documentation/devicetree/bindings/mip</span>
 F:	arch/mips/bcm47xx/*
 F:	arch/mips/include/asm/mach-bcm47xx/*
 
<span class="gi">+BROADCOM BCM4908 ETHERNET DRIVER</span>
<span class="gi">+M:	Rafał Miłecki &lt;rafal@milecki.pl&gt;</span>
<span class="gi">+M:	bcm-kernel-feedback-list@broadcom.com</span>
<span class="gi">+L:	netdev@vger.kernel.org</span>
<span class="gi">+S:	Maintained</span>
<span class="gi">+F:	Documentation/devicetree/bindings/net/brcm,bcm4908enet.yaml</span>
<span class="gi">+F:	drivers/net/ethernet/broadcom/bcm4908enet.*</span>
<span class="gi">+F:	drivers/net/ethernet/broadcom/unimac.h</span>
<span class="gi">+</span>
 BROADCOM BCM5301X ARM ARCHITECTURE
 M:	Hauke Mehrtens &lt;hauke@hauke-m.de&gt;
 M:	Rafał Miłecki &lt;zajec5@gmail.com&gt;
<span class="gd">--- a/drivers/net/ethernet/broadcom/Kconfig</span>
<span class="gi">+++ b/drivers/net/ethernet/broadcom/Kconfig</span>
<span class="gu">@@ -51,6 +51,14 @@ config B44_PCI</span>
 	depends on B44_PCI_AUTOSELECT &amp;&amp; B44_PCICORE_AUTOSELECT
 	default y
 
<span class="gi">+config BCM4908ENET</span>
<span class="gi">+	tristate &quot;Broadcom BCM4908 internal mac support&quot;</span>
<span class="gi">+	depends on ARCH_BCM4908 || COMPILE_TEST</span>
<span class="gi">+	default y</span>
<span class="gi">+	help</span>
<span class="gi">+	  This driver supports Ethernet controller integrated into Broadcom</span>
<span class="gi">+	  BCM4908 family SoCs.</span>
<span class="gi">+</span>
 config BCM63XX_ENET
 	tristate &quot;Broadcom 63xx internal mac support&quot;
 	depends on BCM63XX
<span class="gd">--- a/drivers/net/ethernet/broadcom/Makefile</span>
<span class="gi">+++ b/drivers/net/ethernet/broadcom/Makefile</span>
<span class="gu">@@ -4,6 +4,7 @@</span>
 #
 
 obj-$(CONFIG_B44) += b44.o
<span class="gi">+obj-$(CONFIG_BCM4908ENET) += bcm4908enet.o</span>
 obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o
 obj-$(CONFIG_BCMGENET) += genet/
 obj-$(CONFIG_BNX2) += bnx2.o
<span class="gd">--- /dev/null</span>
<span class="gi">+++ b/drivers/net/ethernet/broadcom/bcm4908enet.c</span>
<span class="gu">@@ -0,0 +1,676 @@</span>
<span class="gi">+// SPDX-License-Identifier: GPL-2.0-only</span>
<span class="gi">+/*</span>
<span class="gi">+ * Copyright (C) 2021 Rafał Miłecki &lt;rafal@milecki.pl&gt;</span>
<span class="gi">+ */</span>
<span class="gi">+</span>
<span class="gi">+#include &lt;linux/delay.h&gt;</span>
<span class="gi">+#include &lt;linux/etherdevice.h&gt;</span>
<span class="gi">+#include &lt;linux/interrupt.h&gt;</span>
<span class="gi">+#include &lt;linux/module.h&gt;</span>
<span class="gi">+#include &lt;linux/of.h&gt;</span>
<span class="gi">+#include &lt;linux/platform_device.h&gt;</span>
<span class="gi">+#include &lt;linux/slab.h&gt;</span>
<span class="gi">+#include &lt;linux/string.h&gt;</span>
<span class="gi">+</span>
<span class="gi">+#include &quot;bcm4908enet.h&quot;</span>
<span class="gi">+#include &quot;unimac.h&quot;</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_DMA_CH_RX_CFG			ENET_DMA_CH0_CFG</span>
<span class="gi">+#define ENET_DMA_CH_TX_CFG			ENET_DMA_CH1_CFG</span>
<span class="gi">+#define ENET_DMA_CH_RX_STATE_RAM		ENET_DMA_CH0_STATE_RAM</span>
<span class="gi">+#define ENET_DMA_CH_TX_STATE_RAM		ENET_DMA_CH1_STATE_RAM</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_TX_BDS_NUM				200</span>
<span class="gi">+#define ENET_RX_BDS_NUM				200</span>
<span class="gi">+#define ENET_RX_BDS_NUM_MAX			8192</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_DMA_INT_DEFAULTS			(ENET_DMA_CH_CFG_INT_DONE | \</span>
<span class="gi">+						 ENET_DMA_CH_CFG_INT_NO_DESC | \</span>
<span class="gi">+						 ENET_DMA_CH_CFG_INT_BUFF_DONE)</span>
<span class="gi">+#define ENET_DMA_MAX_BURST_LEN			8 /* in 64 bit words */</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_MTU_MIN				60</span>
<span class="gi">+#define ENET_MTU_MAX				1500 /* Is it possible to support 2044? */</span>
<span class="gi">+#define ENET_MTU_MAX_EXTRA_SIZE			32 /* L2 */</span>
<span class="gi">+</span>
<span class="gi">+struct bcm4908enet_dma_ring_bd {</span>
<span class="gi">+	__le32 ctl;</span>
<span class="gi">+	__le32 addr;</span>
<span class="gi">+} __packed;</span>
<span class="gi">+</span>
<span class="gi">+struct bcm4908enet_dma_ring_slot {</span>
<span class="gi">+	struct sk_buff *skb;</span>
<span class="gi">+	unsigned int len;</span>
<span class="gi">+	dma_addr_t dma_addr;</span>
<span class="gi">+};</span>
<span class="gi">+</span>
<span class="gi">+struct bcm4908enet_dma_ring {</span>
<span class="gi">+	int is_tx;</span>
<span class="gi">+	int read_idx;</span>
<span class="gi">+	int write_idx;</span>
<span class="gi">+	int length;</span>
<span class="gi">+	u16 cfg_block;</span>
<span class="gi">+	u16 st_ram_block;</span>
<span class="gi">+</span>
<span class="gi">+	union {</span>
<span class="gi">+		void *cpu_addr;</span>
<span class="gi">+		struct bcm4908enet_dma_ring_bd *buf_desc;</span>
<span class="gi">+	};</span>
<span class="gi">+	dma_addr_t dma_addr;</span>
<span class="gi">+</span>
<span class="gi">+	struct bcm4908enet_dma_ring_slot *slots;</span>
<span class="gi">+};</span>
<span class="gi">+</span>
<span class="gi">+struct bcm4908enet {</span>
<span class="gi">+	struct device *dev;</span>
<span class="gi">+	struct net_device *netdev;</span>
<span class="gi">+	struct napi_struct napi;</span>
<span class="gi">+	void __iomem *base;</span>
<span class="gi">+</span>
<span class="gi">+	struct bcm4908enet_dma_ring tx_ring;</span>
<span class="gi">+	struct bcm4908enet_dma_ring rx_ring;</span>
<span class="gi">+};</span>
<span class="gi">+</span>
<span class="gi">+/***</span>
<span class="gi">+ * R/W ops</span>
<span class="gi">+ */</span>
<span class="gi">+</span>
<span class="gi">+static inline u32 enet_read(struct bcm4908enet *enet, u16 offset)</span>
<span class="gi">+{</span>
<span class="gi">+	return readl(enet-&gt;base + offset);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_write(struct bcm4908enet *enet, u16 offset, u32 value)</span>
<span class="gi">+{</span>
<span class="gi">+	writel(value, enet-&gt;base + offset);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set)</span>
<span class="gi">+{</span>
<span class="gi">+	u32 val;</span>
<span class="gi">+</span>
<span class="gi">+	WARN_ON(set &amp; ~mask);</span>
<span class="gi">+</span>
<span class="gi">+	val = enet_read(enet, offset);</span>
<span class="gi">+	val = (val &amp; ~mask) | (set &amp; mask);</span>
<span class="gi">+	enet_write(enet, offset, val);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_set(struct bcm4908enet *enet, u16 offset, u32 set)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_maskset(enet, offset, set, set);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline u32 enet_umac_read(struct bcm4908enet *enet, u16 offset)</span>
<span class="gi">+{</span>
<span class="gi">+	return enet_read(enet, ENET_UNIMAC + offset);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_umac_write(struct bcm4908enet *enet, u16 offset, u32 value)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ENET_UNIMAC + offset, value);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_umac_maskset(struct bcm4908enet *enet, u16 offset, u32 mask, u32 set)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_maskset(enet, ENET_UNIMAC + offset, mask, set);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static inline void enet_umac_set(struct bcm4908enet *enet, u16 offset, u32 set)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_set(enet, ENET_UNIMAC + offset, set);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+/***</span>
<span class="gi">+ * Helpers</span>
<span class="gi">+ */</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_intrs_on(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, ENET_DMA_INT_DEFAULTS);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_intrs_off(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_MASK, 0);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_intrs_ack(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ENET_DMA_CH_RX_CFG + ENET_DMA_CH_CFG_INT_STAT, ENET_DMA_INT_DEFAULTS);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+/***</span>
<span class="gi">+ * DMA</span>
<span class="gi">+ */</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908_dma_alloc_buf_descs(struct bcm4908enet *enet, struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	int size = ring-&gt;length * sizeof(struct bcm4908enet_dma_ring_bd);</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+</span>
<span class="gi">+	ring-&gt;cpu_addr = dma_alloc_coherent(dev, size, &amp;ring-&gt;dma_addr, GFP_KERNEL);</span>
<span class="gi">+	if (!ring-&gt;cpu_addr)</span>
<span class="gi">+		return -ENOMEM;</span>
<span class="gi">+</span>
<span class="gi">+	if (((uintptr_t)ring-&gt;cpu_addr) &amp; (0x40 - 1)) {</span>
<span class="gi">+		dev_err(dev, &quot;Invalid DMA ring alignment\n&quot;);</span>
<span class="gi">+		goto err_free_buf_descs;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	ring-&gt;slots = kzalloc(ring-&gt;length * sizeof(*ring-&gt;slots), GFP_KERNEL);</span>
<span class="gi">+	if (!ring-&gt;slots)</span>
<span class="gi">+		goto err_free_buf_descs;</span>
<span class="gi">+</span>
<span class="gi">+	memset(ring-&gt;cpu_addr, 0, size);</span>
<span class="gi">+</span>
<span class="gi">+	ring-&gt;read_idx = 0;</span>
<span class="gi">+	ring-&gt;write_idx = 0;</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+</span>
<span class="gi">+err_free_buf_descs:</span>
<span class="gi">+	dma_free_coherent(dev, size, ring-&gt;cpu_addr, ring-&gt;dma_addr);</span>
<span class="gi">+	return -ENOMEM;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_free(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring *tx_ring = &amp;enet-&gt;tx_ring;</span>
<span class="gi">+	struct bcm4908enet_dma_ring *rx_ring = &amp;enet-&gt;rx_ring;</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int size;</span>
<span class="gi">+</span>
<span class="gi">+	size = rx_ring-&gt;length * sizeof(struct bcm4908enet_dma_ring_bd);</span>
<span class="gi">+	if (rx_ring-&gt;cpu_addr)</span>
<span class="gi">+		dma_free_coherent(dev, size, rx_ring-&gt;cpu_addr, rx_ring-&gt;dma_addr);</span>
<span class="gi">+	kfree(rx_ring-&gt;slots);</span>
<span class="gi">+</span>
<span class="gi">+	size = tx_ring-&gt;length * sizeof(struct bcm4908enet_dma_ring_bd);</span>
<span class="gi">+	if (tx_ring-&gt;cpu_addr)</span>
<span class="gi">+		dma_free_coherent(dev, size, tx_ring-&gt;cpu_addr, tx_ring-&gt;dma_addr);</span>
<span class="gi">+	kfree(tx_ring-&gt;slots);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_dma_alloc(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring *tx_ring = &amp;enet-&gt;tx_ring;</span>
<span class="gi">+	struct bcm4908enet_dma_ring *rx_ring = &amp;enet-&gt;rx_ring;</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int err;</span>
<span class="gi">+</span>
<span class="gi">+	tx_ring-&gt;length = ENET_TX_BDS_NUM;</span>
<span class="gi">+	tx_ring-&gt;is_tx = 1;</span>
<span class="gi">+	tx_ring-&gt;cfg_block = ENET_DMA_CH_TX_CFG;</span>
<span class="gi">+	tx_ring-&gt;st_ram_block = ENET_DMA_CH_TX_STATE_RAM;</span>
<span class="gi">+	err = bcm4908_dma_alloc_buf_descs(enet, tx_ring);</span>
<span class="gi">+	if (err) {</span>
<span class="gi">+		dev_err(dev, &quot;Failed to alloc TX buf descriptors: %d\n&quot;, err);</span>
<span class="gi">+		return err;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	rx_ring-&gt;length = ENET_RX_BDS_NUM;</span>
<span class="gi">+	rx_ring-&gt;is_tx = 0;</span>
<span class="gi">+	rx_ring-&gt;cfg_block = ENET_DMA_CH_RX_CFG;</span>
<span class="gi">+	rx_ring-&gt;st_ram_block = ENET_DMA_CH_RX_STATE_RAM;</span>
<span class="gi">+	err = bcm4908_dma_alloc_buf_descs(enet, rx_ring);</span>
<span class="gi">+	if (err) {</span>
<span class="gi">+		dev_err(dev, &quot;Failed to alloc RX buf descriptors: %d\n&quot;, err);</span>
<span class="gi">+		bcm4908enet_dma_free(enet);</span>
<span class="gi">+		return err;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_reset(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring *rings[] = { &amp;enet-&gt;rx_ring, &amp;enet-&gt;tx_ring };</span>
<span class="gi">+	int i;</span>
<span class="gi">+</span>
<span class="gi">+	/* Disable the DMA controller and channel */</span>
<span class="gi">+	for (i = 0; i &lt; ARRAY_SIZE(rings); i++)</span>
<span class="gi">+		enet_write(enet, rings[i]-&gt;cfg_block + ENET_DMA_CH_CFG, 0);</span>
<span class="gi">+	enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN, 0);</span>
<span class="gi">+</span>
<span class="gi">+	/* Reset channels state */</span>
<span class="gi">+	for (i = 0; i &lt; ARRAY_SIZE(rings); i++) {</span>
<span class="gi">+		struct bcm4908enet_dma_ring *ring = rings[i];</span>
<span class="gi">+</span>
<span class="gi">+		enet_write(enet, ring-&gt;st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR, 0);</span>
<span class="gi">+		enet_write(enet, ring-&gt;st_ram_block + ENET_DMA_CH_STATE_RAM_STATE_DATA, 0);</span>
<span class="gi">+		enet_write(enet, ring-&gt;st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS, 0);</span>
<span class="gi">+		enet_write(enet, ring-&gt;st_ram_block + ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR, 0);</span>
<span class="gi">+	}</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_dma_alloc_rx_buf(struct bcm4908enet *enet, unsigned int idx)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring_bd *buf_desc = &amp;enet-&gt;rx_ring.buf_desc[idx];</span>
<span class="gi">+	struct bcm4908enet_dma_ring_slot *slot = &amp;enet-&gt;rx_ring.slots[idx];</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	u32 tmp;</span>
<span class="gi">+	int err;</span>
<span class="gi">+</span>
<span class="gi">+	slot-&gt;len = ENET_MTU_MAX + ENET_MTU_MAX_EXTRA_SIZE;</span>
<span class="gi">+</span>
<span class="gi">+	slot-&gt;skb = netdev_alloc_skb(enet-&gt;netdev, slot-&gt;len);</span>
<span class="gi">+	if (!slot-&gt;skb)</span>
<span class="gi">+		return -ENOMEM;</span>
<span class="gi">+</span>
<span class="gi">+	slot-&gt;dma_addr = dma_map_single(dev, slot-&gt;skb-&gt;data, slot-&gt;len, DMA_FROM_DEVICE);</span>
<span class="gi">+	err = dma_mapping_error(dev, slot-&gt;dma_addr);</span>
<span class="gi">+	if (err) {</span>
<span class="gi">+		dev_err(dev, &quot;Failed to map DMA buffer: %d\n&quot;, err);</span>
<span class="gi">+		kfree_skb(slot-&gt;skb);</span>
<span class="gi">+		slot-&gt;skb = NULL;</span>
<span class="gi">+		return err;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	tmp = slot-&gt;len &lt;&lt; DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;</span>
<span class="gi">+	tmp |= DMA_CTL_STATUS_OWN;</span>
<span class="gi">+	if (idx == enet-&gt;rx_ring.length - 1)</span>
<span class="gi">+		tmp |= DMA_CTL_STATUS_WRAP;</span>
<span class="gi">+	buf_desc-&gt;ctl = cpu_to_le32(tmp);</span>
<span class="gi">+	buf_desc-&gt;addr = cpu_to_le32(slot-&gt;dma_addr);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_ring_init(struct bcm4908enet *enet,</span>
<span class="gi">+				      struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	int reset_channel = 0; /* We support only 1 main channel (with TX and RX) */</span>
<span class="gi">+	int reset_subch = ring-&gt;is_tx ? 1 : 0;</span>
<span class="gi">+</span>
<span class="gi">+	/* Reset the DMA channel */</span>
<span class="gi">+	enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, BIT(reset_channel * 2 + reset_subch));</span>
<span class="gi">+	enet_write(enet, ENET_DMA_CTRL_CHANNEL_RESET, 0);</span>
<span class="gi">+</span>
<span class="gi">+	enet_write(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, 0);</span>
<span class="gi">+	enet_write(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG_MAX_BURST, ENET_DMA_MAX_BURST_LEN);</span>
<span class="gi">+	enet_write(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG_INT_MASK, 0);</span>
<span class="gi">+</span>
<span class="gi">+	enet_write(enet, ring-&gt;st_ram_block + ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR,</span>
<span class="gi">+		   (uint32_t)ring-&gt;dma_addr);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_uninit(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring *rx_ring = &amp;enet-&gt;rx_ring;</span>
<span class="gi">+	struct bcm4908enet_dma_ring_slot *slot;</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int i;</span>
<span class="gi">+</span>
<span class="gi">+	for (i = rx_ring-&gt;length - 1; i &gt;= 0; i--) {</span>
<span class="gi">+		slot = &amp;rx_ring-&gt;slots[i];</span>
<span class="gi">+		if (!slot-&gt;skb)</span>
<span class="gi">+			continue;</span>
<span class="gi">+		dma_unmap_single(dev, slot-&gt;dma_addr, slot-&gt;len, DMA_FROM_DEVICE);</span>
<span class="gi">+		kfree_skb(slot-&gt;skb);</span>
<span class="gi">+		slot-&gt;skb = NULL;</span>
<span class="gi">+	}</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_dma_init(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet_dma_ring *rx_ring = &amp;enet-&gt;rx_ring;</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int err;</span>
<span class="gi">+	int i;</span>
<span class="gi">+</span>
<span class="gi">+	for (i = 0; i &lt; rx_ring-&gt;length; i++) {</span>
<span class="gi">+		err = bcm4908enet_dma_alloc_rx_buf(enet, i);</span>
<span class="gi">+		if (err) {</span>
<span class="gi">+			dev_err(dev, &quot;Failed to alloc RX buffer: %d\n&quot;, err);</span>
<span class="gi">+			bcm4908enet_dma_uninit(enet);</span>
<span class="gi">+			return err;</span>
<span class="gi">+		}</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_dma_ring_init(enet, &amp;enet-&gt;tx_ring);</span>
<span class="gi">+	bcm4908enet_dma_ring_init(enet, &amp;enet-&gt;rx_ring);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_tx_ring_ensable(struct bcm4908enet *enet,</span>
<span class="gi">+					    struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_tx_ring_disable(struct bcm4908enet *enet,</span>
<span class="gi">+					    struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_write(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, 0);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_rx_ring_enable(struct bcm4908enet *enet,</span>
<span class="gi">+					   struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	enet_set(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_dma_rx_ring_disable(struct bcm4908enet *enet,</span>
<span class="gi">+					    struct bcm4908enet_dma_ring *ring)</span>
<span class="gi">+{</span>
<span class="gi">+	unsigned long deadline;</span>
<span class="gi">+	u32 tmp;</span>
<span class="gi">+</span>
<span class="gi">+	enet_maskset(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);</span>
<span class="gi">+</span>
<span class="gi">+	deadline = jiffies + usecs_to_jiffies(2000);</span>
<span class="gi">+	do {</span>
<span class="gi">+		tmp = enet_read(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG);</span>
<span class="gi">+		if (!(tmp &amp; ENET_DMA_CH_CFG_ENABLE))</span>
<span class="gi">+			return;</span>
<span class="gi">+		enet_maskset(enet, ring-&gt;cfg_block + ENET_DMA_CH_CFG, ENET_DMA_CH_CFG_ENABLE, 0);</span>
<span class="gi">+		usleep_range(10, 30);</span>
<span class="gi">+	} while (!time_after_eq(jiffies, deadline));</span>
<span class="gi">+</span>
<span class="gi">+	dev_warn(enet-&gt;dev, &quot;Timeout waiting for DMA TX stop\n&quot;);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+/***</span>
<span class="gi">+ * Ethernet driver</span>
<span class="gi">+ */</span>
<span class="gi">+</span>
<span class="gi">+static void bcm4908enet_gmac_init(struct bcm4908enet *enet)</span>
<span class="gi">+{</span>
<span class="gi">+	u32 cmd;</span>
<span class="gi">+</span>
<span class="gi">+	cmd = enet_umac_read(enet, UMAC_CMD);</span>
<span class="gi">+	enet_umac_write(enet, UMAC_CMD, cmd | CMD_SW_RESET);</span>
<span class="gi">+	enet_umac_write(enet, UMAC_CMD, cmd &amp; ~CMD_SW_RESET);</span>
<span class="gi">+</span>
<span class="gi">+	enet_set(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH);</span>
<span class="gi">+	enet_maskset(enet, ENET_FLUSH, ENET_FLUSH_RXFIFO_FLUSH | ENET_FLUSH_TXFIFO_FLUSH, 0);</span>
<span class="gi">+</span>
<span class="gi">+	enet_set(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB);</span>
<span class="gi">+	enet_maskset(enet, ENET_MIB_CTRL, ENET_MIB_CTRL_CLR_MIB, 0);</span>
<span class="gi">+</span>
<span class="gi">+	cmd = enet_umac_read(enet, UMAC_CMD);</span>
<span class="gi">+	cmd &amp;= ~(CMD_SPEED_MASK &lt;&lt; CMD_SPEED_SHIFT);</span>
<span class="gi">+	cmd &amp;= ~CMD_TX_EN;</span>
<span class="gi">+	cmd &amp;= ~CMD_RX_EN;</span>
<span class="gi">+	cmd |= CMD_SPEED_1000 &lt;&lt; CMD_SPEED_SHIFT;</span>
<span class="gi">+	enet_umac_write(enet, UMAC_CMD, cmd);</span>
<span class="gi">+</span>
<span class="gi">+	enet_maskset(enet, ENET_GMAC_STATUS,</span>
<span class="gi">+		     ENET_GMAC_STATUS_ETH_SPEED_MASK |</span>
<span class="gi">+		     ENET_GMAC_STATUS_HD |</span>
<span class="gi">+		     ENET_GMAC_STATUS_AUTO_CFG_EN |</span>
<span class="gi">+		     ENET_GMAC_STATUS_LINK_UP,</span>
<span class="gi">+		     ENET_GMAC_STATUS_ETH_SPEED_1000 |</span>
<span class="gi">+		     ENET_GMAC_STATUS_AUTO_CFG_EN |</span>
<span class="gi">+		     ENET_GMAC_STATUS_LINK_UP);</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static irqreturn_t bcm4908enet_irq_handler(int irq, void *dev_id)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = dev_id;</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_intrs_off(enet);</span>
<span class="gi">+	bcm4908enet_intrs_ack(enet);</span>
<span class="gi">+</span>
<span class="gi">+	napi_schedule(&amp;enet-&gt;napi);</span>
<span class="gi">+</span>
<span class="gi">+	return IRQ_HANDLED;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_open(struct net_device *netdev)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = netdev_priv(netdev);</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int err;</span>
<span class="gi">+</span>
<span class="gi">+	err = request_irq(netdev-&gt;irq, bcm4908enet_irq_handler, 0, &quot;enet&quot;, enet);</span>
<span class="gi">+	if (err) {</span>
<span class="gi">+		dev_err(dev, &quot;Failed to request IRQ %d: %d\n&quot;, netdev-&gt;irq, err);</span>
<span class="gi">+		return err;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_gmac_init(enet);</span>
<span class="gi">+	bcm4908enet_dma_reset(enet);</span>
<span class="gi">+	bcm4908enet_dma_init(enet);</span>
<span class="gi">+</span>
<span class="gi">+	enet_umac_set(enet, UMAC_CMD, CMD_TX_EN | CMD_RX_EN);</span>
<span class="gi">+</span>
<span class="gi">+	enet_set(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_MASTER_EN);</span>
<span class="gi">+	enet_maskset(enet, ENET_DMA_CONTROLLER_CFG, ENET_DMA_CTRL_CFG_FLOWC_CH1_EN, 0);</span>
<span class="gi">+	bcm4908enet_dma_rx_ring_enable(enet, &amp;enet-&gt;rx_ring);</span>
<span class="gi">+</span>
<span class="gi">+	napi_enable(&amp;enet-&gt;napi);</span>
<span class="gi">+	netif_carrier_on(netdev);</span>
<span class="gi">+	netif_start_queue(netdev);</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_intrs_ack(enet);</span>
<span class="gi">+	bcm4908enet_intrs_on(enet);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_stop(struct net_device *netdev)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = netdev_priv(netdev);</span>
<span class="gi">+</span>
<span class="gi">+	netif_stop_queue(netdev);</span>
<span class="gi">+	netif_carrier_off(netdev);</span>
<span class="gi">+	napi_disable(&amp;enet-&gt;napi);</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_dma_rx_ring_disable(enet, &amp;enet-&gt;rx_ring);</span>
<span class="gi">+	bcm4908enet_dma_tx_ring_disable(enet, &amp;enet-&gt;tx_ring);</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_dma_uninit(enet);</span>
<span class="gi">+</span>
<span class="gi">+	free_irq(enet-&gt;netdev-&gt;irq, enet);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_start_xmit(struct sk_buff *skb, struct net_device *netdev)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = netdev_priv(netdev);</span>
<span class="gi">+	struct bcm4908enet_dma_ring *ring = &amp;enet-&gt;tx_ring;</span>
<span class="gi">+	struct bcm4908enet_dma_ring_slot *slot;</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	struct bcm4908enet_dma_ring_bd *buf_desc;</span>
<span class="gi">+	int free_buf_descs;</span>
<span class="gi">+	u32 tmp;</span>
<span class="gi">+</span>
<span class="gi">+	/* Free transmitted skbs */</span>
<span class="gi">+	while (ring-&gt;read_idx != ring-&gt;write_idx) {</span>
<span class="gi">+		buf_desc = &amp;ring-&gt;buf_desc[ring-&gt;read_idx];</span>
<span class="gi">+		if (buf_desc-&gt;ctl &amp; DMA_CTL_STATUS_OWN)</span>
<span class="gi">+			break;</span>
<span class="gi">+		slot = &amp;ring-&gt;slots[ring-&gt;read_idx];</span>
<span class="gi">+</span>
<span class="gi">+		dma_unmap_single(dev, slot-&gt;dma_addr, slot-&gt;len, DMA_TO_DEVICE);</span>
<span class="gi">+		dev_kfree_skb(slot-&gt;skb);</span>
<span class="gi">+		if (++ring-&gt;read_idx == ring-&gt;length)</span>
<span class="gi">+			ring-&gt;read_idx = 0;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	/* Don&#39;t use the last empty buf descriptor */</span>
<span class="gi">+	if (ring-&gt;read_idx &lt;= ring-&gt;write_idx)</span>
<span class="gi">+		free_buf_descs = ring-&gt;read_idx - ring-&gt;write_idx + ring-&gt;length;</span>
<span class="gi">+	else</span>
<span class="gi">+		free_buf_descs = ring-&gt;read_idx - ring-&gt;write_idx;</span>
<span class="gi">+	if (free_buf_descs &lt; 2)</span>
<span class="gi">+		return NETDEV_TX_BUSY;</span>
<span class="gi">+</span>
<span class="gi">+	/* Hardware removes OWN bit after sending data */</span>
<span class="gi">+	buf_desc = &amp;ring-&gt;buf_desc[ring-&gt;write_idx];</span>
<span class="gi">+	if (unlikely(le32_to_cpu(buf_desc-&gt;ctl) &amp; DMA_CTL_STATUS_OWN)) {</span>
<span class="gi">+		netif_stop_queue(netdev);</span>
<span class="gi">+		return NETDEV_TX_BUSY;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	slot = &amp;ring-&gt;slots[ring-&gt;write_idx];</span>
<span class="gi">+	slot-&gt;skb = skb;</span>
<span class="gi">+	slot-&gt;len = skb-&gt;len;</span>
<span class="gi">+	slot-&gt;dma_addr = dma_map_single(dev, skb-&gt;data, skb-&gt;len, DMA_TO_DEVICE);</span>
<span class="gi">+	if (unlikely(dma_mapping_error(dev, slot-&gt;dma_addr)))</span>
<span class="gi">+		return NETDEV_TX_BUSY;</span>
<span class="gi">+</span>
<span class="gi">+	tmp = skb-&gt;len &lt;&lt; DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;</span>
<span class="gi">+	tmp |= DMA_CTL_STATUS_OWN;</span>
<span class="gi">+	tmp |= DMA_CTL_STATUS_SOP;</span>
<span class="gi">+	tmp |= DMA_CTL_STATUS_EOP;</span>
<span class="gi">+	tmp |= DMA_CTL_STATUS_APPEND_CRC;</span>
<span class="gi">+	if (ring-&gt;write_idx + 1 == ring-&gt;length - 1)</span>
<span class="gi">+		tmp |= DMA_CTL_STATUS_WRAP;</span>
<span class="gi">+</span>
<span class="gi">+	buf_desc-&gt;addr = cpu_to_le32((uint32_t)slot-&gt;dma_addr);</span>
<span class="gi">+	buf_desc-&gt;ctl = cpu_to_le32(tmp);</span>
<span class="gi">+</span>
<span class="gi">+	bcm4908enet_dma_tx_ring_ensable(enet, &amp;enet-&gt;tx_ring);</span>
<span class="gi">+</span>
<span class="gi">+	if (++ring-&gt;write_idx == ring-&gt;length - 1)</span>
<span class="gi">+		ring-&gt;write_idx = 0;</span>
<span class="gi">+	enet-&gt;netdev-&gt;stats.tx_bytes += skb-&gt;len;</span>
<span class="gi">+	enet-&gt;netdev-&gt;stats.tx_packets++;</span>
<span class="gi">+</span>
<span class="gi">+	return NETDEV_TX_OK;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_poll(struct napi_struct *napi, int weight)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = container_of(napi, struct bcm4908enet, napi);</span>
<span class="gi">+	struct device *dev = enet-&gt;dev;</span>
<span class="gi">+	int handled = 0;</span>
<span class="gi">+</span>
<span class="gi">+	while (handled &lt; weight) {</span>
<span class="gi">+		struct bcm4908enet_dma_ring_bd *buf_desc;</span>
<span class="gi">+		struct bcm4908enet_dma_ring_slot slot;</span>
<span class="gi">+		u32 ctl;</span>
<span class="gi">+		int len;</span>
<span class="gi">+		int err;</span>
<span class="gi">+</span>
<span class="gi">+		buf_desc = &amp;enet-&gt;rx_ring.buf_desc[enet-&gt;rx_ring.read_idx];</span>
<span class="gi">+		ctl = le32_to_cpu(buf_desc-&gt;ctl);</span>
<span class="gi">+		if (ctl &amp; DMA_CTL_STATUS_OWN)</span>
<span class="gi">+			break;</span>
<span class="gi">+</span>
<span class="gi">+		slot = enet-&gt;rx_ring.slots[enet-&gt;rx_ring.read_idx];</span>
<span class="gi">+</span>
<span class="gi">+		/* Provide new buffer before unpinning the old one */</span>
<span class="gi">+		err = bcm4908enet_dma_alloc_rx_buf(enet, enet-&gt;rx_ring.read_idx);</span>
<span class="gi">+		if (err)</span>
<span class="gi">+			break;</span>
<span class="gi">+</span>
<span class="gi">+		if (++enet-&gt;rx_ring.read_idx == enet-&gt;rx_ring.length)</span>
<span class="gi">+			enet-&gt;rx_ring.read_idx = 0;</span>
<span class="gi">+</span>
<span class="gi">+		len = (ctl &amp; DMA_CTL_LEN_DESC_BUFLENGTH) &gt;&gt; DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;</span>
<span class="gi">+</span>
<span class="gi">+		if (len &lt; ENET_MTU_MIN ||</span>
<span class="gi">+		    (ctl &amp; (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {</span>
<span class="gi">+			enet-&gt;netdev-&gt;stats.rx_dropped++;</span>
<span class="gi">+			break;</span>
<span class="gi">+		}</span>
<span class="gi">+</span>
<span class="gi">+		dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE);</span>
<span class="gi">+</span>
<span class="gi">+		skb_put(slot.skb, len - 4 + 2);</span>
<span class="gi">+		slot.skb-&gt;protocol = eth_type_trans(slot.skb, enet-&gt;netdev);</span>
<span class="gi">+		netif_receive_skb(slot.skb);</span>
<span class="gi">+</span>
<span class="gi">+		enet-&gt;netdev-&gt;stats.rx_packets++;</span>
<span class="gi">+		enet-&gt;netdev-&gt;stats.rx_bytes += len;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	if (handled &lt; weight) {</span>
<span class="gi">+		napi_complete_done(napi, handled);</span>
<span class="gi">+		bcm4908enet_intrs_on(enet);</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	return handled;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static const struct net_device_ops bcm96xx_netdev_ops = {</span>
<span class="gi">+	.ndo_open = bcm4908enet_open,</span>
<span class="gi">+	.ndo_stop = bcm4908enet_stop,</span>
<span class="gi">+	.ndo_start_xmit = bcm4908enet_start_xmit,</span>
<span class="gi">+	.ndo_set_mac_address = eth_mac_addr,</span>
<span class="gi">+};</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_probe(struct platform_device *pdev)</span>
<span class="gi">+{</span>
<span class="gi">+	struct device *dev = &amp;pdev-&gt;dev;</span>
<span class="gi">+	struct net_device *netdev;</span>
<span class="gi">+	struct bcm4908enet *enet;</span>
<span class="gi">+	int err;</span>
<span class="gi">+</span>
<span class="gi">+	netdev = devm_alloc_etherdev(dev, sizeof(*enet));</span>
<span class="gi">+	if (!netdev)</span>
<span class="gi">+		return -ENOMEM;</span>
<span class="gi">+</span>
<span class="gi">+	enet = netdev_priv(netdev);</span>
<span class="gi">+	enet-&gt;dev = dev;</span>
<span class="gi">+	enet-&gt;netdev = netdev;</span>
<span class="gi">+</span>
<span class="gi">+	enet-&gt;base = devm_platform_ioremap_resource(pdev, 0);</span>
<span class="gi">+	if (IS_ERR(enet-&gt;base)) {</span>
<span class="gi">+		dev_err(dev, &quot;Failed to map registers: %ld\n&quot;, PTR_ERR(enet-&gt;base));</span>
<span class="gi">+		return PTR_ERR(enet-&gt;base);</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	netdev-&gt;irq = platform_get_irq_byname(pdev, &quot;rx&quot;);</span>
<span class="gi">+	if (netdev-&gt;irq &lt; 0)</span>
<span class="gi">+		return netdev-&gt;irq;</span>
<span class="gi">+</span>
<span class="gi">+	dma_set_coherent_mask(dev, DMA_BIT_MASK(32));</span>
<span class="gi">+</span>
<span class="gi">+	err = bcm4908enet_dma_alloc(enet);</span>
<span class="gi">+	if (err)</span>
<span class="gi">+		return err;</span>
<span class="gi">+</span>
<span class="gi">+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</span>
<span class="gi">+	eth_hw_addr_random(netdev);</span>
<span class="gi">+	netdev-&gt;netdev_ops = &amp;bcm96xx_netdev_ops;</span>
<span class="gi">+	netdev-&gt;min_mtu = ETH_ZLEN;</span>
<span class="gi">+	netdev-&gt;mtu = ENET_MTU_MAX;</span>
<span class="gi">+	netdev-&gt;max_mtu = ENET_MTU_MAX;</span>
<span class="gi">+	netif_napi_add(netdev, &amp;enet-&gt;napi, bcm4908enet_poll, 64);</span>
<span class="gi">+</span>
<span class="gi">+	err = register_netdev(netdev);</span>
<span class="gi">+	if (err) {</span>
<span class="gi">+		bcm4908enet_dma_free(enet);</span>
<span class="gi">+		return err;</span>
<span class="gi">+	}</span>
<span class="gi">+</span>
<span class="gi">+	platform_set_drvdata(pdev, enet);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static int bcm4908enet_remove(struct platform_device *pdev)</span>
<span class="gi">+{</span>
<span class="gi">+	struct bcm4908enet *enet = platform_get_drvdata(pdev);</span>
<span class="gi">+</span>
<span class="gi">+	unregister_netdev(enet-&gt;netdev);</span>
<span class="gi">+	netif_napi_del(&amp;enet-&gt;napi);</span>
<span class="gi">+	bcm4908enet_dma_free(enet);</span>
<span class="gi">+</span>
<span class="gi">+	return 0;</span>
<span class="gi">+}</span>
<span class="gi">+</span>
<span class="gi">+static const struct of_device_id bcm4908enet_of_match[] = {</span>
<span class="gi">+	{ .compatible = &quot;brcm,bcm4908enet&quot;},</span>
<span class="gi">+	{},</span>
<span class="gi">+};</span>
<span class="gi">+</span>
<span class="gi">+static struct platform_driver bcm4908enet_driver = {</span>
<span class="gi">+	.driver = {</span>
<span class="gi">+		.name = &quot;bcm4908enet&quot;,</span>
<span class="gi">+		.of_match_table = bcm4908enet_of_match,</span>
<span class="gi">+	},</span>
<span class="gi">+	.probe	= bcm4908enet_probe,</span>
<span class="gi">+	.remove = bcm4908enet_remove,</span>
<span class="gi">+};</span>
<span class="gi">+module_platform_driver(bcm4908enet_driver);</span>
<span class="gi">+</span>
<span class="gi">+MODULE_LICENSE(&quot;GPL v2&quot;);</span>
<span class="gi">+MODULE_DEVICE_TABLE(of, bcm4908enet_of_match);</span>
<span class="gd">--- /dev/null</span>
<span class="gi">+++ b/drivers/net/ethernet/broadcom/bcm4908enet.h</span>
<span class="gu">@@ -0,0 +1,96 @@</span>
<span class="gi">+/* SPDX-License-Identifier: GPL-2.0-only */</span>
<span class="gi">+#ifndef __BCM4908ENET_H</span>
<span class="gi">+#define __BCM4908ENET_H</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_CONTROL					0x000</span>
<span class="gi">+#define ENET_MIB_CTRL					0x004</span>
<span class="gi">+#define  ENET_MIB_CTRL_CLR_MIB				0x00000001</span>
<span class="gi">+#define ENET_RX_ERR_MASK				0x008</span>
<span class="gi">+#define ENET_MIB_MAX_PKT_SIZE				0x00C</span>
<span class="gi">+#define  ENET_MIB_MAX_PKT_SIZE_VAL			0x00003fff</span>
<span class="gi">+#define ENET_DIAG_OUT					0x01c</span>
<span class="gi">+#define ENET_ENABLE_DROP_PKT				0x020</span>
<span class="gi">+#define ENET_IRQ_ENABLE					0x024</span>
<span class="gi">+#define  ENET_IRQ_ENABLE_OVFL				0x00000001</span>
<span class="gi">+#define ENET_GMAC_STATUS				0x028</span>
<span class="gi">+#define  ENET_GMAC_STATUS_ETH_SPEED_MASK		0x00000003</span>
<span class="gi">+#define  ENET_GMAC_STATUS_ETH_SPEED_10			0x00000000</span>
<span class="gi">+#define  ENET_GMAC_STATUS_ETH_SPEED_100			0x00000001</span>
<span class="gi">+#define  ENET_GMAC_STATUS_ETH_SPEED_1000		0x00000002</span>
<span class="gi">+#define  ENET_GMAC_STATUS_HD				0x00000004</span>
<span class="gi">+#define  ENET_GMAC_STATUS_AUTO_CFG_EN			0x00000008</span>
<span class="gi">+#define  ENET_GMAC_STATUS_LINK_UP			0x00000010</span>
<span class="gi">+#define ENET_IRQ_STATUS					0x02c</span>
<span class="gi">+#define  ENET_IRQ_STATUS_OVFL				0x00000001</span>
<span class="gi">+#define ENET_OVERFLOW_COUNTER				0x030</span>
<span class="gi">+#define ENET_FLUSH					0x034</span>
<span class="gi">+#define  ENET_FLUSH_RXFIFO_FLUSH			0x00000001</span>
<span class="gi">+#define  ENET_FLUSH_TXFIFO_FLUSH			0x00000002</span>
<span class="gi">+#define ENET_RSV_SELECT					0x038</span>
<span class="gi">+#define ENET_BP_FORCE					0x03c</span>
<span class="gi">+#define  ENET_BP_FORCE_FORCE				0x00000001</span>
<span class="gi">+#define ENET_DMA_RX_OK_TO_SEND_COUNT			0x040</span>
<span class="gi">+#define  ENET_DMA_RX_OK_TO_SEND_COUNT_VAL		0x0000000f</span>
<span class="gi">+#define ENET_TX_CRC_CTRL				0x044</span>
<span class="gi">+#define ENET_MIB					0x200</span>
<span class="gi">+#define ENET_UNIMAC					0x400</span>
<span class="gi">+#define ENET_DMA					0x800</span>
<span class="gi">+#define ENET_DMA_CONTROLLER_CFG				0x800</span>
<span class="gi">+#define  ENET_DMA_CTRL_CFG_MASTER_EN			0x00000001</span>
<span class="gi">+#define  ENET_DMA_CTRL_CFG_FLOWC_CH1_EN			0x00000002</span>
<span class="gi">+#define  ENET_DMA_CTRL_CFG_FLOWC_CH3_EN			0x00000004</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH1_THRESH_LO			0x804</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH1_THRESH_HI			0x808</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH1_ALLOC			0x80c</span>
<span class="gi">+#define  ENET_DMA_FLOWCTL_CH1_ALLOC_FORCE		0x80000000</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH3_THRESH_LO			0x810</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH3_THRESH_HI			0x814</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH3_ALLOC			0x818</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH5_THRESH_LO			0x81C</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH5_THRESH_HI			0x820</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH5_ALLOC			0x824</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH7_THRESH_LO			0x828</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH7_THRESH_HI			0x82C</span>
<span class="gi">+#define ENET_DMA_FLOWCTL_CH7_ALLOC			0x830</span>
<span class="gi">+#define ENET_DMA_CTRL_CHANNEL_RESET			0x834</span>
<span class="gi">+#define ENET_DMA_CTRL_CHANNEL_DEBUG			0x838</span>
<span class="gi">+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_STATUS		0x840</span>
<span class="gi">+#define ENET_DMA_CTRL_GLOBAL_INTERRUPT_MASK		0x844</span>
<span class="gi">+#define ENET_DMA_CH0_CFG				0xa00		/* RX */</span>
<span class="gi">+#define ENET_DMA_CH1_CFG				0xa10		/* TX */</span>
<span class="gi">+#define ENET_DMA_CH0_STATE_RAM				0xc00		/* RX */</span>
<span class="gi">+#define ENET_DMA_CH1_STATE_RAM				0xc10		/* TX */</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_DMA_CH_CFG					0x00		/* assorted configuration */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_ENABLE				0x00000001	/* set to enable channel */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_PKT_HALT			0x00000002	/* idle after an EOP flag is detected */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_BURST_HALT			0x00000004	/* idle after finish current memory burst */</span>
<span class="gi">+#define ENET_DMA_CH_CFG_INT_STAT			0x04		/* interrupts control and status */</span>
<span class="gi">+#define ENET_DMA_CH_CFG_INT_MASK			0x08		/* interrupts mask */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_INT_BUFF_DONE			0x00000001	/* buffer done */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_INT_DONE			0x00000002	/* packet xfer complete */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_INT_NO_DESC			0x00000004	/* no valid descriptors */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_INT_RX_ERROR			0x00000008	/* rxdma detect client protocol error */</span>
<span class="gi">+#define ENET_DMA_CH_CFG_MAX_BURST			0x0c		/* max burst length permitted */</span>
<span class="gi">+#define  ENET_DMA_CH_CFG_MAX_BURST_DESCSIZE_SEL		0x00040000	/* DMA Descriptor Size Selection */</span>
<span class="gi">+#define ENET_DMA_CH_CFG_SIZE				0x10</span>
<span class="gi">+</span>
<span class="gi">+#define ENET_DMA_CH_STATE_RAM_BASE_DESC_PTR		0x00		/* descriptor ring start address */</span>
<span class="gi">+#define ENET_DMA_CH_STATE_RAM_STATE_DATA		0x04		/* state/bytes done/ring offset */</span>
<span class="gi">+#define ENET_DMA_CH_STATE_RAM_DESC_LEN_STATUS		0x08		/* buffer descriptor status and len */</span>
<span class="gi">+#define ENET_DMA_CH_STATE_RAM_DESC_BASE_BUFPTR		0x0c		/* buffer descrpitor current processing */</span>
<span class="gi">+#define ENET_DMA_CH_STATE_RAM_SIZE			0x10</span>
<span class="gi">+</span>
<span class="gi">+#define DMA_CTL_STATUS_APPEND_CRC			0x00000100</span>
<span class="gi">+#define DMA_CTL_STATUS_APPEND_BRCM_TAG			0x00000200</span>
<span class="gi">+#define DMA_CTL_STATUS_PRIO				0x00000C00  /* Prio for Tx */</span>
<span class="gi">+#define DMA_CTL_STATUS_WRAP				0x00001000  /* */</span>
<span class="gi">+#define DMA_CTL_STATUS_SOP				0x00002000  /* first buffer in packet */</span>
<span class="gi">+#define DMA_CTL_STATUS_EOP				0x00004000  /* last buffer in packet */</span>
<span class="gi">+#define DMA_CTL_STATUS_OWN				0x00008000  /* cleared by DMA, set by SW */</span>
<span class="gi">+#define DMA_CTL_LEN_DESC_BUFLENGTH			0x0fff0000</span>
<span class="gi">+#define DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT		16</span>
<span class="gi">+#define DMA_CTL_LEN_DESC_MULTICAST			0x40000000</span>
<span class="gi">+#define DMA_CTL_LEN_DESC_USEFPM				0x80000000</span>
<span class="gi">+</span>
<span class="gi">+#endif</span>
</pre></div>
</code></pre></td></tr></table>
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