1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
|
--- a/arch/arm/mach-cns21xx/common.h
+++ b/arch/arm/mach-cns21xx/common.h
@@ -17,4 +17,7 @@ void cns21xx_timer_init(void);
extern struct sys_timer cns21xx_timer;
+int cns21xx_register_uart0(void);
+int cns21xx_register_uart1(void);
+
#endif /* _MACH_CNS21XX_COMMON_H */
--- /dev/null
+++ b/arch/arm/mach-cns21xx/devices.c
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2008 Cavium Networks
+ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+
+#include <mach/irqs.h>
+#include <mach/hardware.h>
+#include <mach/cns21xx.h>
+#include <mach/cns21xx_misc.h>
+
+#define CNS21XX_UART_CLOCK 24000000
+
+#define CNS21XX_UART_FLAGS (UPF_SKIP_TEST | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST)
+
+static struct plat_serial8250_port cns21xx_uart0_data[] = {
+ {
+ .mapbase = CNS21XX_UART0_BASE,
+ .membase = (void *) CNS21XX_UART0_BASE_VIRT,
+ .irq = CNS21XX_IRQ_UART0,
+ .uartclk = CNS21XX_UART_CLOCK,
+ .regshift = 2,
+ .iotype = UPIO_MEM,
+ .type = PORT_16550A,
+ .flags = CNS21XX_UART_FLAGS,
+ }, {
+ /* terminating entry */
+ },
+};
+
+static struct platform_device cns21xx_uart0_device = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM,
+ .dev = {
+ .platform_data = cns21xx_uart0_data,
+ },
+};
+
+int __init cns21xx_register_uart0(void)
+{
+ return platform_device_register(&cns21xx_uart0_device);
+}
+
+static struct plat_serial8250_port cns21xx_uart1_data[] = {
+ {
+ .mapbase = CNS21XX_UART1_BASE,
+ .membase = (void *) CNS21XX_UART1_BASE_VIRT,
+ .irq = CNS21XX_IRQ_UART1,
+ .uartclk = CNS21XX_UART_CLOCK,
+ .regshift = 2,
+ .iotype = UPIO_MEM,
+ .type = PORT_16550A,
+ .flags = CNS21XX_UART_FLAGS,
+ }, {
+ /* terminating entry */
+ },
+};
+
+static struct platform_device cns21xx_uart1_device = {
+ .name = "serial8250",
+ .id = PLAT8250_DEV_PLATFORM1,
+ .dev = {
+ .platform_data = cns21xx_uart1_data,
+ },
+};
+
+int __init cns21xx_register_uart1(void)
+{
+ HAL_MISC_ENABLE_UART1_PINS();
+ return platform_device_register(&cns21xx_uart1_device);
+}
--- a/arch/arm/mach-cns21xx/Makefile
+++ b/arch/arm/mach-cns21xx/Makefile
@@ -4,7 +4,7 @@
# Object file lists.
-obj-y := core.o irq.o mm.o time.o idle.o
+obj-y := core.o irq.o mm.o time.o idle.o devices.o
# machine specific files
|
