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From a55a0d71c2b1000c514f30573ced00879754f223 Mon Sep 17 00:00:00 2001
From: Vladimir Oltean <vladimir.oltean@nxp.com>
Date: Fri, 29 Nov 2019 03:07:14 +0200
Subject: [PATCH] arm64: dts: fsl: Specify phy-mode for CPU ports
PHYLINK requires that device tree nodes have a phy-mode or
phy-connection-type property. The internal Felix ports really are
connected to the ENETC via 2 back-to-back MACs, so the correct MII type
is GMII (one of which is overclocked at 2.5Gbaud, but still GMII).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -795,6 +795,8 @@
/* internal to-cpu ports */
port@4 {
reg = <4>;
+ phy-mode = "gmii";
+
fixed-link {
speed = <1000>;
full-duplex;
@@ -803,6 +805,8 @@
port@5 {
reg = <5>;
ethernet = <&enetc_port3>;
+ phy-mode = "gmii";
+
fixed-link {
speed = <1000>;
full-duplex;
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