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From c77e142beed7241a1360f2dedbe34e2f697512c9 Mon Sep 17 00:00:00 2001
From: Madalin Bucur <madalin.bucur@nxp.com>
Date: Tue, 29 Aug 2017 09:51:45 +0300
Subject: [PATCH] sdk_dpaa: use new api ethtool_ksettings_{get|set}

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
---
 .../net/ethernet/freescale/sdk_dpaa/dpaa_ethtool.c   | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

--- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_ethtool.c
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_ethtool.c
@@ -84,8 +84,8 @@ static char dpa_stats_global[][ETH_GSTRI
 #define DPA_STATS_PERCPU_LEN ARRAY_SIZE(dpa_stats_percpu)
 #define DPA_STATS_GLOBAL_LEN ARRAY_SIZE(dpa_stats_global)
 
-static int __cold dpa_get_settings(struct net_device *net_dev,
-		struct ethtool_cmd *et_cmd)
+static int __cold dpa_get_ksettings(struct net_device *net_dev,
+		struct ethtool_link_ksettings *cmd)
 {
 	int			 _errno;
 	struct dpa_priv_s	*priv;
@@ -101,15 +101,13 @@ static int __cold dpa_get_settings(struc
 		return 0;
 	}
 
-	_errno = phy_ethtool_gset(priv->mac_dev->phy_dev, et_cmd);
-	if (unlikely(_errno < 0))
-		netdev_err(net_dev, "phy_ethtool_gset() = %d\n", _errno);
+	phy_ethtool_ksettings_get(priv->mac_dev->phy_dev, cmd);
 
 	return _errno;
 }
 
-static int __cold dpa_set_settings(struct net_device *net_dev,
-		struct ethtool_cmd *et_cmd)
+static int __cold dpa_set_ksettings(struct net_device *net_dev,
+		struct ethtool_link_ksettings *cmd)
 {
 	int			 _errno;
 	struct dpa_priv_s	*priv;
@@ -125,9 +123,9 @@ static int __cold dpa_set_settings(struc
 		return -ENODEV;
 	}
 
-	_errno = phy_ethtool_sset(priv->mac_dev->phy_dev, et_cmd);
+	_errno = phy_ethtool_ksettings_set(priv->mac_dev->phy_dev, cmd);
 	if (unlikely(_errno < 0))
-		netdev_err(net_dev, "phy_ethtool_sset() = %d\n", _errno);
+		netdev_err(net_dev, "phy_ethtool_ksettings_set() = %d\n", _errno);
 
 	return _errno;
 }
@@ -522,8 +520,8 @@ static void dpa_get_strings(struct net_d
 }
 
 const struct ethtool_ops dpa_ethtool_ops = {
-	.get_settings = dpa_get_settings,
-	.set_settings = dpa_set_settings,
+	.get_link_ksettings = dpa_get_ksettings,
+	.set_link_ksettings = dpa_set_ksettings,
 	.get_drvinfo = dpa_get_drvinfo,
 	.get_msglevel = dpa_get_msglevel,
 	.set_msglevel = dpa_set_msglevel,
href='#n322'>322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452
From a5009b362d65c24e7b2a40824e351903d75a47dc Mon Sep 17 00:00:00 2001
From: Alex Marginean <alexandru.marginean@nxp.com>
Date: Mon, 6 Jan 2020 16:36:44 +0200
Subject: [PATCH] arm64: dts: fsl-ls1028a: prepare dts for overlay

Named the ports node of the Felix Eth switch so it can be used in DT
overlays to associate the ports with proper PHYs.
Ports are now by default disabled in dtsi, so if the board dts doesn't
do anything about them they stay disabled.
Updated RDB and QDS dts files to match.
Replaced all 'phy-connection-type' with 'phy-mode'.
The set-up for protocol 7777 on QDS was changed to a single quad port card
in slot 1.  This requires a QDS board with no lane B rework and a AQR412
or similar PHY card without any lane rework done on it.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
---
 .../boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi   | 58 ++++++++++-----------
 .../boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi   | 59 ++++++++++------------
 .../boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi   | 51 ++++++++++++-------
 .../boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi   | 43 ++++++++++------
 arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts  | 44 +++++++++-------
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi     | 27 +++++++---
 6 files changed, 161 insertions(+), 121 deletions(-)

--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
@@ -7,50 +7,50 @@
  */
 
 &mdio_slot1 {
-	/* two ports on AQR412 */
-	slot1_sxgmii2: ethernet-phy@2 {
-		reg = <0x2>;
+	slot1_sxgmii0: ethernet-phy@0 {
+		reg = <0x0>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-	slot1_sxgmii3: ethernet-phy@3 {
-		reg = <0x3>;
+
+	slot1_sxgmii1: ethernet-phy@1 {
+		reg = <0x1>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-};
 
-&mdio_slot2 {
-	slot2_sxgmii0: ethernet-phy@2 {
-		/* AQR112 */
+	slot1_sxgmii2: ethernet-phy@2 {
 		reg = <0x2>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-};
 
-&mdio_slot3 {
-	slot3_sxgmii0: ethernet-phy@2 {
-		/* AQR112 */
-		reg = <0x2>;
+	slot1_sxgmii3: ethernet-phy@3 {
+		reg = <0x3>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
 };
 
 /* l2switch ports */
-&switch_port0 {
-	phy-handle = <&slot1_sxgmii2>;
-	phy-connection-type = "2500base-x";
-};
+&mscc_felix_ports {
+	port@0 {
+		status = "okay";
+		phy-handle = <&slot1_sxgmii0>;
+		phy-mode = "2500base-x";
+	};
 
-&switch_port1 {
-	phy-handle = <&slot2_sxgmii0>;
-	phy-connection-type = "2500base-x";
-};
+	port@1 {
+		status = "okay";
+		phy-handle = <&slot1_sxgmii1>;
+		phy-mode = "2500base-x";
+	};
 
-&switch_port2 {
-	phy-handle = <&slot3_sxgmii0>;
-	phy-connection-type = "2500base-x";
-};
+	port@2 {
+		status = "okay";
+		phy-handle = <&slot1_sxgmii2>;
+		phy-mode = "2500base-x";
+	};
 
-&switch_port3 {
-	phy-handle = <&slot1_sxgmii3>;
-	phy-connection-type = "2500base-x";
+	port@3 {
+		status = "okay";
+		phy-handle = <&slot1_sxgmii3>;
+		phy-mode = "2500base-x";
+	};
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
@@ -11,50 +11,47 @@
 	slot1_sgmii0: ethernet-phy@1c {
 		reg = <0x1c>;
 	};
+
 	slot1_sgmii1: ethernet-phy@1d {
 		reg = <0x1d>;
 	};
+
 	slot1_sgmii2: ethernet-phy@1e {
 		reg = <0x1e>;
 	};
-	slot1_sgmii3: ethernet-phy@1f {
-		reg = <0x1f>;
-	};
-};
 
-&mdio_slot2 {
-	/* VSC8234 */
-	slot2_sgmii0: ethernet-phy@1c {
-		reg = <0x1c>;
-	};
-	slot2_sgmii1: ethernet-phy@1d {
-		reg = <0x1d>;
-	};
-	slot2_sgmii2: ethernet-phy@1e {
-		reg = <0x1e>;
-	};
-	slot2_sgmii3: ethernet-phy@1f {
+	slot1_sgmii3: ethernet-phy@1f {
 		reg = <0x1f>;
 	};
 };
 
 /* l2switch ports */
-&switch_port0 {
-	phy-handle = <&slot1_sgmii0>;
-	phy-connection-type = "sgmii";
-};
+&mscc_felix_ports {
+	port@0 {
+		status = "okay";
+		phy-handle = <&slot1_sgmii0>;
+		phy-mode = "sgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port1 {
-	phy-handle = <&slot2_sgmii0>;
-	phy-connection-type = "sgmii";
-};
+	port@1 {
+		status = "okay";
+		phy-handle = <&slot1_sgmii1>;
+		phy-mode = "sgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port2 {
-	phy-handle = <&slot1_sgmii2>;
-	phy-connection-type = "sgmii";
-};
+	port@2 {
+		status = "okay";
+		phy-handle = <&slot1_sgmii2>;
+		phy-mode = "sgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port3 {
-	phy-handle = <&slot1_sgmii3>;
-	phy-connection-type = "sgmii";
+	port@3 {
+		status = "okay";
+		phy-handle = <&slot1_sgmii3>;
+		phy-mode = "sgmii";
+		managed = "in-band-status";
+	};
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
@@ -8,41 +8,54 @@
 
 &mdio_slot2 {
 	/* 4 ports on AQR412 */
-	slot2_qsgmii0: ethernet-phy@0 {
+	slot2_qxgmii0: ethernet-phy@0 {
 		reg = <0x0>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-	slot2_qsgmii1: ethernet-phy@1 {
+
+	slot2_qxgmii1: ethernet-phy@1 {
 		reg = <0x1>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-	slot2_qsgmii2: ethernet-phy@2 {
+
+	slot2_qxgmii2: ethernet-phy@2 {
 		reg = <0x2>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
-	slot2_qsgmii3: ethernet-phy@3 {
+
+	slot2_qxgmii3: ethernet-phy@3 {
 		reg = <0x3>;
 		compatible = "ethernet-phy-ieee802.3-c45";
 	};
 };
 
 /* l2switch ports */
-&switch_port0 {
-	phy-handle = <&slot2_qsgmii0>;
-	phy-connection-type = "usxgmii";
-};
+&mscc_felix_ports {
+	port@0 {
+		status = "okay";
+		phy-handle = <&slot2_qxgmii0>;
+		phy-mode = "usxgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port1 {
-	phy-handle = <&slot2_qsgmii1>;
-	phy-connection-type = "usxgmii";
-};
+	port@1 {
+		status = "okay";
+		phy-handle = <&slot2_qxgmii1>;
+		phy-mode = "usxgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port2 {
-	phy-handle = <&slot2_qsgmii2>;
-	phy-connection-type = "usxgmii";
-};
+	port@2 {
+		status = "okay";
+		phy-handle = <&slot2_qxgmii2>;
+		phy-mode = "usxgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port3 {
-	phy-handle = <&slot2_qsgmii3>;
-	phy-connection-type = "usxgmii";
+	port@3 {
+		status = "okay";
+		phy-handle = <&slot2_qxgmii3>;
+		phy-mode = "usxgmii";
+		managed = "in-band-status";
+	};
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
@@ -11,34 +11,47 @@
 	slot2_qsgmii0: ethernet-phy@8 {
 		reg = <0x8>;
 	};
+
 	slot2_qsgmii1: ethernet-phy@9 {
 		reg = <0x9>;
 	};
+
 	slot2_qsgmii2: ethernet-phy@a {
 		reg = <0xa>;
 	};
+
 	slot2_qsgmii3: ethernet-phy@b {
 		reg = <0xb>;
 	};
 };
 
 /* l2switch ports */
-&switch_port0 {
-	phy-handle = <&slot2_qsgmii0>;
-	phy-connection-type = "qsgmii";
-};
+&mscc_felix_ports {
+	port@0 {
+		status = "okay";
+		phy-handle = <&slot2_qsgmii0>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port1 {
-	phy-handle = <&slot2_qsgmii1>;
-	phy-connection-type = "qsgmii";
-};
+	port@1 {
+		status = "okay";
+		phy-handle = <&slot2_qsgmii1>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port2 {
-	phy-handle = <&slot2_qsgmii2>;
-	phy-connection-type = "qsgmii";
-};
+	port@2 {
+		status = "okay";
+		phy-handle = <&slot2_qsgmii2>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port3 {
-	phy-handle = <&slot2_qsgmii3>;
-	phy-connection-type = "qsgmii";
+	port@3 {
+		status = "okay";
+		phy-handle = <&slot2_qsgmii3>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 };
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
@@ -233,28 +233,34 @@
 };
 
 /* l2switch ports */
-&switch_port0 {
-	phy-handle = <&qsgmii_phy1>;
-	phy-connection-type = "qsgmii";
-	managed = "in-band-status";
-};
+&mscc_felix_ports {
+	port@0 {
+		status = "okay";
+		phy-handle = <&qsgmii_phy1>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port1 {
-	phy-handle = <&qsgmii_phy2>;
-	phy-connection-type = "qsgmii";
-	managed = "in-band-status";
-};
+	port@1 {
+		status = "okay";
+		phy-handle = <&qsgmii_phy2>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port2 {
-	phy-handle = <&qsgmii_phy3>;
-	phy-connection-type = "qsgmii";
-	managed = "in-band-status";
-};
+	port@2 {
+		status = "okay";
+		phy-handle = <&qsgmii_phy3>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 
-&switch_port3 {
-	phy-handle = <&qsgmii_phy4>;
-	phy-connection-type = "qsgmii";
-	managed = "in-band-status";
+	port@3 {
+		status = "okay";
+		phy-handle = <&qsgmii_phy4>;
+		phy-mode = "qsgmii";
+		managed = "in-band-status";
+	};
 };
 
 &sai4 {
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -774,30 +774,39 @@
 				clocks = <&clockgen 2 3>;
 				little-endian;
 			};
-			switch@0,5 {
+
+			ethernet-switch@0,5 {
 				reg = <0x000500 0 0 0 0>;
 				/* IEP INT_B */
 				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 
-				ports {
+				mscc_felix_ports: ports {
 					#address-cells = <1>;
 					#size-cells = <0>;
 
 					/* external ports */
-					switch_port0: port@0 {
+					mscc_felix_port0: port@0 {
 						reg = <0>;
+						status = "disabled";
 					};
-					switch_port1: port@1 {
+
+					mscc_felix_port1: port@1 {
 						reg = <1>;
+						status = "disabled";
 					};
-					switch_port2: port@2 {
+
+					mscc_felix_port2: port@2 {
 						reg = <2>;
+						status = "disabled";
 					};
-					switch_port3: port@3 {
+
+					mscc_felix_port3: port@3 {
 						reg = <3>;
+						status = "disabled";
 					};
+
 					/* internal to-cpu ports */
-					port@4 {
+					mscc_felix_port4: port@4 {
 						reg = <4>;
 						ethernet = <&enetc_port2>;
 						phy-mode = "gmii";
@@ -807,7 +816,8 @@
 							full-duplex;
 						};
 					};
-					port@5 {
+
+					mscc_felix_port5: port@5 {
 						reg = <5>;
 						phy-mode = "gmii";
 						status = "disabled";
@@ -819,6 +829,7 @@
 					};
 				};
 			};
+
 			enetc_port3: ethernet@0,6 {
 				compatible = "fsl,enetc";
 				reg = <0x000600 0 0 0 0>;