1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
|
From bfc02cc199dc6259c2f4e2af8f77c88fe8ba4cc5 Mon Sep 17 00:00:00 2001
From: Camelia Groza <camelia.groza@nxp.com>
Date: Tue, 5 Mar 2019 11:55:54 +0200
Subject: [PATCH] sdk_dpaa: ls1043a errata: impose S/G frame realignment
Scatter/Gather frames are not support on LS1043A beacuse they trigger
the A010022 errata.
Even though we do not advertise S/G support to the stack, we need to
make sure that if S/G frames do reach the driver somehow, they trigger
the errata workaround.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
---
drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h | 7 ++++---
.../net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c | 23 +++++-----------------
2 files changed, 9 insertions(+), 21 deletions(-)
--- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h
@@ -653,9 +653,10 @@ static inline void _dpa_bp_free_pf(void
/* LS1043A SoC has a HW issue regarding FMan DMA transactions; The issue
* manifests itself at high traffic rates when frames cross 4K memory
- * boundaries or when they are not aligned to 16 bytes; For the moment, we
- * use a SW workaround that realigns frames to 256 bytes. Scatter/Gather
- * frames aren't supported on egress.
+ * boundaries, when they are not aligned to 16 bytes or when they have
+ * Scatter/Gather fragments; For the moment, we use a SW workaround that
+ * realigns frames to 256 bytes. Scatter/Gather frames aren't supported
+ * on egress.
*/
#ifndef CONFIG_PPC
--- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c
+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c
@@ -772,18 +772,19 @@ EXPORT_SYMBOL(skb_to_contig_fd);
#ifndef CONFIG_PPC
/* Verify the conditions that trigger the A010022 errata: data unaligned to
- * 16 bytes and 4K memory address crossings.
+ * 16 bytes, 4K memory address crossings and S/G fragments.
*/
static bool a010022_check_skb(struct sk_buff *skb, struct dpa_priv_s *priv)
{
- int nr_frags, i = 0;
- skb_frag_t *frag;
-
/* Check if the headroom is aligned */
if (((uintptr_t)skb->data - priv->tx_headroom) %
priv->buf_layout[TX].data_align != 0)
return true;
+ /* Check for paged data in the skb. We do not support S/G fragments */
+ if (skb_is_nonlinear(skb))
+ return true;
+
/* Check if the headroom crosses a boundary */
if (HAS_DMA_ISSUE(skb->head, skb_headroom(skb)))
return true;
@@ -796,20 +797,6 @@ static bool a010022_check_skb(struct sk_
if (HAS_DMA_ISSUE(skb->head, skb_end_offset(skb)))
return true;
- nr_frags = skb_shinfo(skb)->nr_frags;
-
- while (i < nr_frags) {
- frag = &skb_shinfo(skb)->frags[i];
-
- /* Check if a paged fragment crosses a boundary from its
- * offset to its end.
- */
- if (HAS_DMA_ISSUE(frag->page_offset, frag->size))
- return true;
-
- i++;
- }
-
return false;
}
|