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From a563dccef2871e37efcfcb2f3faee7c9f9381f6c Mon Sep 17 00:00:00 2001
From: Calvin Johnson <calvin.johnson@nxp.com>
Date: Wed, 20 Jun 2018 10:23:41 +0530
Subject: [PATCH] staging: fsl_ppfe/eth: handle ls1012a errata_a010897
On LS1012A rev 1.0, Jumbo frames are not supported as it causes
the PFE controller to hang. A reset of the entire chip is required
to resume normal operation.
To handle this errata, frames with length > 1900 are truncated for
rev 1.0 of LS1012A.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
---
drivers/staging/fsl_ppfe/pfe_eth.c | 20 +++++++++++++++++++-
drivers/staging/fsl_ppfe/pfe_eth.h | 3 ++-
drivers/staging/fsl_ppfe/pfe_hal.c | 10 +++++++++-
3 files changed, 30 insertions(+), 3 deletions(-)
--- a/drivers/staging/fsl_ppfe/pfe_eth.c
+++ b/drivers/staging/fsl_ppfe/pfe_eth.c
@@ -44,6 +44,7 @@
#include <linux/delay.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
+#include <linux/fsl/guts.h>
#if defined(CONFIG_NF_CONNTRACK_MARK)
#include <net/netfilter/nf_conntrack.h>
@@ -52,6 +53,10 @@
#include "pfe_mod.h"
#include "pfe_eth.h"
+#define LS1012A_REV_1_0 0x87040010
+
+bool pfe_errata_a010897;
+
static void *cbus_emac_base[3];
static void *cbus_gpi_base[3];
@@ -2362,7 +2367,15 @@ static int pfe_eth_init_one(struct pfe *
/* Set MTU limits */
ndev->min_mtu = ETH_MIN_MTU;
- ndev->max_mtu = JUMBO_FRAME_SIZE;
+
+/*
+ * Jumbo frames are not supported on LS1012A rev-1.0.
+ * So max mtu should be restricted to supported frame length.
+ */
+ if (pfe_errata_a010897)
+ ndev->max_mtu = JUMBO_FRAME_SIZE_V1 - ETH_HLEN - ETH_FCS_LEN;
+ else
+ ndev->max_mtu = JUMBO_FRAME_SIZE_V2 - ETH_HLEN - ETH_FCS_LEN;
/* supported features */
ndev->hw_features = NETIF_F_SG;
@@ -2453,6 +2466,11 @@ int pfe_eth_init(struct pfe *pfe)
cbus_gpi_base[0] = EGPI1_BASE_ADDR;
cbus_gpi_base[1] = EGPI2_BASE_ADDR;
+ if (fsl_guts_get_svr() == LS1012A_REV_1_0)
+ pfe_errata_a010897 = true;
+ else
+ pfe_errata_a010897 = false;
+
for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) {
err = pfe_eth_init_one(pfe, ii);
if (err)
--- a/drivers/staging/fsl_ppfe/pfe_eth.h
+++ b/drivers/staging/fsl_ppfe/pfe_eth.h
@@ -85,7 +85,8 @@ struct ls1012a_pfe_platform_data {
#define EMAC_TXQ_CNT 16
#define EMAC_TXQ_DEPTH (HIF_TX_DESC_NT)
-#define JUMBO_FRAME_SIZE 10258
+#define JUMBO_FRAME_SIZE_V1 1900
+#define JUMBO_FRAME_SIZE_V2 10258
/*
* Client Tx queue threshold, for txQ flush condition.
* It must be smaller than the queue size (in case we ever change it in the
--- a/drivers/staging/fsl_ppfe/pfe_hal.c
+++ b/drivers/staging/fsl_ppfe/pfe_hal.c
@@ -19,6 +19,9 @@
#include "pfe_mod.h"
#include "pfe/pfe.h"
+/* A-010897: Jumbo frame is not supported */
+extern bool pfe_errata_a010897;
+
#define PFE_RCR_MAX_FL_MASK 0xC000FFFF
void *cbus_base_addr;
@@ -1102,7 +1105,12 @@ void gemac_set_config(void *base, struct
/*GEMAC config taken from VLSI */
writel(0x00000004, base + EMAC_TFWR_STR_FWD);
writel(0x00000005, base + EMAC_RX_SECTION_FULL);
- writel(0x00003fff, base + EMAC_TRUNC_FL);
+
+ if (pfe_errata_a010897)
+ writel(0x0000076c, base + EMAC_TRUNC_FL);
+ else
+ writel(0x00003fff, base + EMAC_TRUNC_FL);
+
writel(0x00000030, base + EMAC_TX_SECTION_EMPTY);
writel(0x00000000, base + EMAC_MIB_CTRL_STS_REG);
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