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From 002297dd2634e993257a00fe4458b0288ec7baea Mon Sep 17 00:00:00 2001
From: Calvin Johnson <calvin.johnson@nxp.com>
Date: Wed, 27 Mar 2019 13:25:57 +0530
Subject: [PATCH] staging: fsl_ppfe/eth: adapt to link mode based phydev
changes
Setting link mode bits have changed with the integration of
commit (3c1bcc8 net: ethernet: Convert phydev advertize and
supported from u32 to link mode). Adapt to the new method of
setting and clearing the link mode bits.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
---
drivers/staging/fsl_ppfe/pfe_eth.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
--- a/drivers/staging/fsl_ppfe/pfe_eth.c
+++ b/drivers/staging/fsl_ppfe/pfe_eth.c
@@ -701,10 +701,14 @@ static int pfe_eth_set_pauseparam(struct
EGPI_PAUSE_ENABLE),
priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
if (priv->phydev) {
- priv->phydev->supported |= ADVERTISED_Pause |
- ADVERTISED_Asym_Pause;
- priv->phydev->advertising |= ADVERTISED_Pause |
- ADVERTISED_Asym_Pause;
+ linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+ priv->phydev->supported);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+ priv->phydev->supported);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+ priv->phydev->advertising);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+ priv->phydev->advertising);
}
} else {
gemac_disable_pause_rx(priv->EMAC_baseaddr);
@@ -712,10 +716,14 @@ static int pfe_eth_set_pauseparam(struct
~EGPI_PAUSE_ENABLE),
priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
if (priv->phydev) {
- priv->phydev->supported &= ~(ADVERTISED_Pause |
- ADVERTISED_Asym_Pause);
- priv->phydev->advertising &= ~(ADVERTISED_Pause |
- ADVERTISED_Asym_Pause);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+ priv->phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+ priv->phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+ priv->phydev->advertising);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+ priv->phydev->advertising);
}
}
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