1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
From 9507f517ac4080627515c31c937f45a4a58ccbe4 Mon Sep 17 00:00:00 2001
From: Alex Marginean <alexandru.marginean@nxp.com>
Date: Fri, 14 Feb 2020 17:28:26 +0000
Subject: [PATCH] LF-924: net/enetc: Set MAC Rx FIFO to recommended value
On LS1028A the MAC Rx FIFO defaults to value 2, which is too high and may
lead to Rx lock-up under traffic. Set it to 1 instead, as recommended by
the hardware team.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Acked-by: Jason Liu <jason.hui.liu@nxp.com>
---
drivers/net/ethernet/freescale/enetc/enetc_hw.h | 2 ++
drivers/net/ethernet/freescale/enetc/enetc_pf.c | 6 ++++++
2 files changed, 8 insertions(+)
--- a/drivers/net/ethernet/freescale/enetc/enetc_hw.h
+++ b/drivers/net/ethernet/freescale/enetc/enetc_hw.h
@@ -226,6 +226,8 @@ enum enetc_bdr_type {TX, RX};
#define ENETC_PM0_MAXFRM 0x8014
#define ENETC_SET_TX_MTU(val) ((val) << 16)
#define ENETC_SET_MAXFRM(val) ((val) & 0xffff)
+#define ENETC_PM0_RX_FIFO 0x801c
+#define ENETC_PM0_RX_FIFO_VAL 1
#define ENETC_PM_IMDIO_BASE 0x8030
/* PCS registers */
--- a/drivers/net/ethernet/freescale/enetc/enetc_pf.c
+++ b/drivers/net/ethernet/freescale/enetc/enetc_pf.c
@@ -536,6 +536,12 @@ static void enetc_configure_port_mac(str
enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII);
enetc_port_wr(hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_XGMII);
}
+
+ /* on LS1028A the MAC Rx FIFO defaults to value 2, which is too high and
+ * may lead to Rx lock-up under traffic. Set it to 1 instead, as
+ * recommended by the hardware team.
+ */
+ enetc_port_wr(hw, ENETC_PM0_RX_FIFO, ENETC_PM0_RX_FIFO_VAL);
}
static void enetc_configure_port_pmac(struct enetc_hw *hw)
|
