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From da5a7765a20d34508036ba8ed1db87e546abcf4b Mon Sep 17 00:00:00 2001
From: Yuantian Tang <andy.tang@nxp.com>
Date: Mon, 25 May 2020 17:33:22 +0800
Subject: [PATCH] thermal: qoriq: Update the settings for TMUv2
For TMU v2, TMSAR registers need to be set properly to get the
accurate temperature values.
Also the temperature read needs to be converted to degree Celsius
since it is in degrees Kelvin.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
---
drivers/thermal/qoriq_thermal.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -23,6 +23,7 @@
#define TMTMIR_DEFAULT 0x0000000f
#define TIER_DISABLE 0x0
#define TEUMR0_V2 0x51009c00
+#define TMSARA_V2 0xe
#define TMU_VER1 0x1
#define TMU_VER2 0x2
@@ -35,6 +36,13 @@ struct qoriq_tmu_site_regs {
u8 res0[0x8];
};
+struct qoriq_tmu_tmsar {
+ u32 res0;
+ u32 tmsar;
+ u32 res1;
+ u32 res2;
+};
+
struct qoriq_tmu_regs_v1 {
u32 tmr; /* Mode Register */
u32 tsr; /* Status Register */
@@ -95,7 +103,9 @@ struct qoriq_tmu_regs_v2 {
u32 tscfgr; /* Sensor Configuration Register */
u8 res6[0x78];
struct qoriq_tmu_site_regs site[SITES_MAX];
- u8 res7[0x9f8];
+ u8 res10[0x100];
+ struct qoriq_tmu_tmsar tmsar[16];
+ u8 res7[0x7f8];
u32 ipbrr0; /* IP Block Revision Register 0 */
u32 ipbrr1; /* IP Block Revision Register 1 */
u8 res8[0x300];
@@ -158,7 +168,10 @@ static int tmu_get_temp(void *p, int *te
u32 val;
val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
- *temp = (val & 0xff) * 1000;
+ if (qdata->ver == TMU_VER1)
+ *temp = (val & 0xff) * 1000;
+ else
+ *temp = (val & 0x1ff) * 1000 - 273150;
return 0;
}
@@ -319,6 +332,8 @@ static int qoriq_tmu_calibration(struct
static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
{
+ int i;
+
/* Disable interrupt, using polling instead */
tmu_write(data, TIER_DISABLE, &data->regs->tier);
@@ -328,6 +343,8 @@ static void qoriq_tmu_init_device(struct
} else {
tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
+ for (i = 0; i < 7; i++)
+ tmu_write(data, TMSARA_V2, &data->regs_v2->tmsar[i].tmsar);
}
/* Disable monitoring */
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