aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/mediatek/patches-4.9/0010-clk-add-hifsys-reset.patch
blob: a7ebb060ce8ec7c4952610e6a74821336f94a91b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
From 600e2bd5c3019f31e90ec876f4efb6c209cf0d73 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Wed, 6 Jan 2016 20:06:49 +0100
Subject: [PATCH 10/57] clk: add hifsys reset

Hi,

small patch to add hifsys reset bits. Maybe you could add it to the next
version of your patch series. i have teste scpsys and clk on mt7623 today
and it works well.

thanks,
	John

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/clk/mediatek/clk-mt2701.c | 2 ++
 1 file changed, 2 insertions(+)

--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc
 	if (r)
 		pr_err("%s(): could not register clock provider: %d\n",
 			__func__, r);
+
+	mtk_register_reset_controller(node, 1, 0x34);
 }
 CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init);