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/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "iodata,wn-ax1167gr", "mediatek,mt7621-soc";
model = "I-O DATA WN-AX1167GR";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "wn-ax1167gr:green:power";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
wps {
label = "wn-ax1167gr:green:wps";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
auto {
label = "auto";
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
custom {
label = "custom";
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
};
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "Config";
reg = <0x30000 0x10000>;
read-only;
};
Factory: partition@40000 {
label = "Factory";
reg = <0x40000 0x10000>;
read-only;
};
iNIC_rf: partition@50000 {
label = "iNIC_rf";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x60000 0xf30000>;
};
partition@f90000 {
label = "Key";
reg = <0xf90000 0x10000>;
read-only;
};
partition@fa0000 {
label = "backup";
reg = <0xfa0000 0x10000>;
read-only;
};
partition@fb0000 {
label = "storage";
reg = <0xfb0000 0x50000>;
read-only;
};
};
};
};
ðernet {
mtd-mac-address = <&iNIC_rf 0x4>;
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "uart2", "uart3", "jtag";
ralink,function = "gpio";
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
};
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&Factory 0x0>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&xhci {
status = "disabled";
};
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