diff options
Diffstat (limited to 'PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/JST_SH4_SKINNY.kicad_mod')
-rw-r--r-- | PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/JST_SH4_SKINNY.kicad_mod | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/JST_SH4_SKINNY.kicad_mod b/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/JST_SH4_SKINNY.kicad_mod new file mode 100644 index 00000000..63923898 --- /dev/null +++ b/PCB/Testers/OSO-SWAT-A2-00/Adafruit QT Py.pretty/JST_SH4_SKINNY.kicad_mod @@ -0,0 +1,37 @@ +(footprint "JST_SH4_SKINNY" (version 20211014) (generator pcbnew) + (layer "F.Cu") + (tedit 0) + (fp_text reference "REF**" (at -4.6 -3.614) (layer "F.SilkS") + (effects (font (size 0.93472 0.93472) (thickness 0.08128)) (justify left bottom)) + (tstamp fac4a590-0d55-4a95-b4e7-83ba07f6efdd) + ) + (fp_text value "" (at 0 0) (layer "F.Fab") + (effects (font (size 1.27 1.27) (thickness 0.15))) + (tstamp f3d0e681-8fa2-44bf-bcb1-7ec8134cc334) + ) + (fp_text user "JST SH 4" (at -3.33 4.006) (layer "F.Fab") + (effects (font (size 0.93472 0.93472) (thickness 0.08128)) (justify left bottom)) + (tstamp b7a8345b-f7f9-40ae-af11-a969c1d7c015) + ) + (fp_line (start 1.9 -2.214) (end 3.1 -2.214) (layer "F.SilkS") (width 0.1524) (tstamp 09ecea0f-8511-42df-be45-c7a4e38367c6)) + (fp_line (start -3 -2.214) (end -1.9 -2.214) (layer "F.SilkS") (width 0.1524) (tstamp 36fecf24-4c91-43f6-bad2-489234ac0564)) + (fp_line (start -2.1 2.086) (end 2.1 2.086) (layer "F.SilkS") (width 0.1524) (tstamp 4bb5f948-2e2d-4a47-b8c1-3457bdf9c8fd)) + (fp_line (start -3 0.386) (end -3 -2.214) (layer "F.SilkS") (width 0.1524) (tstamp 626ff103-e33e-49ef-8705-59c77bf0ae74)) + (fp_line (start 3.1 -2.214) (end 3.1 0.386) (layer "F.SilkS") (width 0.1524) (tstamp c7c5026d-d557-4e65-bb72-839a884e0381)) + (fp_line (start -3 -2.164) (end 3.1 -2.164) (layer "F.Fab") (width 0.1524) (tstamp 30ac0272-430e-4b1f-9916-7d12079f251a)) + (fp_line (start 3.1 -2.164) (end 3.1 2.086) (layer "F.Fab") (width 0.1524) (tstamp 461762fd-fc44-4a08-be5e-49a1b236dc66)) + (fp_line (start 3.1 2.086) (end -3 2.086) (layer "F.Fab") (width 0.1524) (tstamp 6a5d5090-87cd-4086-88de-552524b9e8e0)) + (fp_line (start -3 2.086) (end -3 -2.164) (layer "F.Fab") (width 0.1524) (tstamp bf2e6a90-d643-4a85-8067-709fcfbc315b)) + (pad "1" smd rect (at -1.5 -2.514 90) (size 1.55 0.5) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp 47911a51-7cb1-4c36-a6bf-cc8a0da82507)) + (pad "2" smd rect (at -0.5 -2.514 90) (size 1.55 0.5) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp f5b7ccdc-9ee2-4c73-9ede-2dce371d60a3)) + (pad "3" smd rect (at 0.5 -2.514 90) (size 1.55 0.5) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp e7ba26db-154f-44ca-b9c3-0010652899db)) + (pad "4" smd rect (at 1.5 -2.514 90) (size 1.55 0.5) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp 1ea96295-774c-46dc-952b-1cf3a6452a54)) + (pad "MT1" smd rect (at -2.8 1.386 90) (size 1.8 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp 63b4dfe5-2bb8-4add-b642-d8b4f58acb8d)) + (pad "MT2" smd rect (at 2.8 1.386 90) (size 1.8 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.0508) (tstamp 004d5d00-f82d-46eb-97bb-c04c6f1fc809)) +) |