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| author | Julien Grall <julien.grall@linaro.org> | 2013-06-13 15:52:49 +0100 |
|---|---|---|
| committer | Ian Campbell <ian.campbell@citrix.com> | 2013-06-13 17:48:17 +0100 |
| commit | 2caac1caa19bdaeb9ab14b2baf1342e00c4d0495 (patch) | |
| tree | cd6cfa5a6f1d38bd61cba701a77fa1ed8fd4f1fd | |
| parent | c4cf4c30a8a282ee874a0ab8aed43493cf6a928c (diff) | |
| download | xen-2caac1caa19bdaeb9ab14b2baf1342e00c4d0495.tar.gz xen-2caac1caa19bdaeb9ab14b2baf1342e00c4d0495.tar.bz2 xen-2caac1caa19bdaeb9ab14b2baf1342e00c4d0495.zip | |
xen/arm: Use the right GICD register to initialize IRQs routing
Currently IRQs routing is initialized to the wrong register and overwrites
interrupt configuration register (ICFGRn).
Reported-by: Sander Bogaert <sander.bogaert@elis.ugent.be>
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
| -rw-r--r-- | xen/arch/arm/gic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index d9940ead05..177560e3d1 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -280,7 +280,7 @@ static void __init gic_dist_init(void) /* Route all global IRQs to this CPU */ for ( i = 32; i < gic.lines; i += 4 ) - GICD[GICD_ICFGR + i / 4] = cpumask; + GICD[GICD_ITARGETSR + i / 4] = cpumask; /* Default priority for global interrupts */ for ( i = 32; i < gic.lines; i += 4 ) |