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authorDiego Ismirlian <dismirlian (at) google's mail.com>2017-10-29 17:52:54 -0300
committerDiego Ismirlian <dismirlian (at) google's mail.com>2017-10-29 17:52:54 -0300
commitf4cf7e5591c47b978d2141486fe7f98400c3c5bc (patch)
tree5deb523e6f9e4a605d629d35fb889be29b52be81 /testhal/STM32
parentdecde2ca4c21220f6daab0880de08cd974dd62ef (diff)
parenta0089c14daa3c5c9ef6e0e30b26efaae2ccda128 (diff)
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Merge branch 'master' of https://github.com/ChibiOS/ChibiOS-Contrib
Diffstat (limited to 'testhal/STM32')
-rw-r--r--testhal/STM32/STM32F0xx/crc/chconf.h1
-rw-r--r--testhal/STM32/STM32F0xx/onewire/chconf.h1
-rw-r--r--testhal/STM32/STM32F0xx/qei/chconf.h1
-rw-r--r--testhal/STM32/STM32F1xx/onewire/chconf.h1
-rw-r--r--testhal/STM32/STM32F1xx/qei/chconf.h1
-rw-r--r--testhal/STM32/STM32F3xx/COMP/chconf.h1
-rw-r--r--testhal/STM32/STM32F3xx/EEProm/chconf.h1
-rw-r--r--testhal/STM32/STM32F3xx/TIMCAP/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/EICU/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/USB_HOST/chconf.h1
-rw-r--r--testhal/STM32/STM32F4xx/onewire/chconf.h1
-rw-r--r--testhal/STM32/STM32F7xx/USB_MSD/chconf.h1
-rw-r--r--testhal/STM32/STM32F7xx/USB_MSD/main.c2
16 files changed, 16 insertions, 1 deletions
diff --git a/testhal/STM32/STM32F0xx/crc/chconf.h b/testhal/STM32/STM32F0xx/crc/chconf.h
index c2d6f04..6a187da 100644
--- a/testhal/STM32/STM32F0xx/crc/chconf.h
+++ b/testhal/STM32/STM32F0xx/crc/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F0xx/onewire/chconf.h b/testhal/STM32/STM32F0xx/onewire/chconf.h
index 724dc02..4b2d922 100644
--- a/testhal/STM32/STM32F0xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F0xx/onewire/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F0xx/qei/chconf.h b/testhal/STM32/STM32F0xx/qei/chconf.h
index 71cbe47..b3260d4 100644
--- a/testhal/STM32/STM32F0xx/qei/chconf.h
+++ b/testhal/STM32/STM32F0xx/qei/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F1xx/onewire/chconf.h b/testhal/STM32/STM32F1xx/onewire/chconf.h
index ee20e3c..b38dfa3 100644
--- a/testhal/STM32/STM32F1xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F1xx/onewire/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F1xx/qei/chconf.h b/testhal/STM32/STM32F1xx/qei/chconf.h
index 71cbe47..b3260d4 100644
--- a/testhal/STM32/STM32F1xx/qei/chconf.h
+++ b/testhal/STM32/STM32F1xx/qei/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F3xx/COMP/chconf.h b/testhal/STM32/STM32F3xx/COMP/chconf.h
index 00eb395..894f737 100644
--- a/testhal/STM32/STM32F3xx/COMP/chconf.h
+++ b/testhal/STM32/STM32F3xx/COMP/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F3xx/EEProm/chconf.h b/testhal/STM32/STM32F3xx/EEProm/chconf.h
index 00eb395..894f737 100644
--- a/testhal/STM32/STM32F3xx/EEProm/chconf.h
+++ b/testhal/STM32/STM32F3xx/EEProm/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F3xx/TIMCAP/chconf.h b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h
index 00eb395..894f737 100644
--- a/testhal/STM32/STM32F3xx/TIMCAP/chconf.h
+++ b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/EICU/chconf.h b/testhal/STM32/STM32F4xx/EICU/chconf.h
index ad6b53a..736770d 100644
--- a/testhal/STM32/STM32F4xx/EICU/chconf.h
+++ b/testhal/STM32/STM32F4xx/EICU/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
index 1065821..cf950cd 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
index 1065821..cf950cd 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
index 1065821..cf950cd 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
index 449cb3d..e112daf 100644
--- a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
+++ b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F4xx/onewire/chconf.h b/testhal/STM32/STM32F4xx/onewire/chconf.h
index 1065821..cf950cd 100644
--- a/testhal/STM32/STM32F4xx/onewire/chconf.h
+++ b/testhal/STM32/STM32F4xx/onewire/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F7xx/USB_MSD/chconf.h b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h
index 8bdd9f2..346c876 100644
--- a/testhal/STM32/STM32F7xx/USB_MSD/chconf.h
+++ b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h
@@ -29,6 +29,7 @@
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
+#define _CHIBIOS_RT_CONF_VER_5_0_
/*===========================================================================*/
/**
diff --git a/testhal/STM32/STM32F7xx/USB_MSD/main.c b/testhal/STM32/STM32F7xx/USB_MSD/main.c
index cae2b74..87ca8d2 100644
--- a/testhal/STM32/STM32F7xx/USB_MSD/main.c
+++ b/testhal/STM32/STM32F7xx/USB_MSD/main.c
@@ -102,7 +102,7 @@ int main(void) {
* start mass storage
*/
msdObjectInit(&USBMSD1);
- msdStart(&USBMSD1, &USBD1, (BaseBlockDevice *)&ramdisk, blkbuf, NULL);
+ msdStart(&USBMSD1, &USBD1, (BaseBlockDevice *)&ramdisk, blkbuf, NULL, NULL);
/*
*
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-27 01:24:47 +0000