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* Makefile: Deflate handling of unsupported programmers for DJGPPNico Huber2021-07-121-78/+6
| | | | | | | | Change-Id: I86988aa7ef1d2d4189be3d25b9aea4e7ddaec9af Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55874 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Add macro to disable unsupported programmersNico Huber2021-07-121-0/+7
| | | | | | | | | | | | | | `mark_unsupported` disables all programmers passed as arguments and adds them to the UNSUPPORTED_FEATURES list. It's conveniently used with our dependency lists, e.g. $(call mark_unsupported,$(NEEDS_LIBUSB1) $(NEEDS_LIBFTDI)) Change-Id: I6c9b66dfa89ec3d71675576d03fcebfdea30ce7b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55873 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: Gather lists of dependencies by feature/libNico Huber2021-07-121-0/+49
| | | | | | | | | | | For each feature or library that we treat as dependency, list which programmers depend on it. Change-Id: I6929181f18213e1434cbbc7ba2d2b0b04bd46a6a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55872 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: Move $(NEED_LIBFTDI) block to similar onesNico Huber2021-07-121-10/+10
| | | | | | | | Change-Id: I27eae3803a114f332a6f0713cf9bc90163030e1b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: Move NI845X_SPI default to the other defaultsNico Huber2021-07-121-3/+3
| | | | | | | | Change-Id: I0317eb1190eae366a142d9410bee4110edc06e3d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55870 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "Mark ENE_LPC and MEC1308 as NEED_LIBPCI"Nico Huber2021-07-121-4/+0
| | | | | | | | | | | | | | | | This reverts commit cf1e8f7b904ddf639b29b2e1bb0ad681c1aad76d. It's an indirect, spurious dependency. Why clutter the build system with it? Instead, the functions these programmers actually depend on should be factored into a compilation unit that doesn't need PCI. No matter this change, compilation with `CONFIG_INTERNAL=no` is broken because of these programmers right now. Change-Id: I134eb7d74b44f92dfdea3c764f39bc3673739fa0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests.c: Move opening brace on new line for function bodyAnastasia Klimchuk2021-07-081-6/+12
| | | | | | | | | | | | BUG=b:181803212 TEST=builds and ninja test Change-Id: Ia1b00bb68ec2426161bfc183d93d2c0719a949ec Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55974 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashrom.8: Add Anastasia to authors listEdward O'Callaghan2021-07-081-0/+2
| | | | | | | | | | Change-Id: Ib1ede56e2446833f7dc9acacdb0f26ed822bc7a4 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* layout: Turn overlap debug message into warningNico Huber2021-07-061-2/+2
| | | | | | | | | | | | | Let's assume this function is only called when overlapping, included regions are fatal. Change-Id: Ie969e0538d302ccd58d3fec3921265ed3621eaa5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* layout: Fix overlap-check routineNico Huber2021-07-061-1/+1
| | | | | | | | | | | | | | Fixes a regression introduced by commit 06a89d713 (layout: Introduce layout_next()). A negation was dropped by accident which resulted in comparisons with later, not-included regions instead of included ones. Change-Id: I18168b9bd9a7d0fe2ba04fb091d1600f65d6dd5b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ich_descriptors: Normalize chipset detectionNico Huber2021-06-301-11/+7
| | | | | | | | | | | | | | | | Normalize the fallback paths: * Always end with the newest, assumed compatible chipset. * Perform tighter checks when it's about warnings only. * If two chipsets seem compatible, always return the same (this is currently the case for 8/9 series and 300/400 series which we can't distinguish). Change-Id: Ic5a5fee870202173b3a9813b03ec261e8ee45155 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55651 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ich_descriptors: Don't base chipset detection on `freq_read`Nico Huber2021-06-301-5/+3
| | | | | | | | | | | | | Only warn if the `freq_read` setting looks odd but don't override our previous guess. The `freq_read` check was taken from `ifdtool` but seems less reliable than our own detection scheme. Change-Id: I658d76ec2567d1d660a18d0b0ae71c744e603e8f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55650 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
* ich_descriptors: Revise detection for chipsets w/ ICCRIBANico Huber2021-06-302-22/+26
| | | | | | | | | | | | | | | Detection based on ICCRIBA and FMSBA became a little messy lately. However, there's a new static difference: Since 300 series (Cannon Point), there is an MDTBA field in FLUMAP1 that has always been 0 (reserved) before. Taking this into account, we can relax the checks on ICCRIBA. Change-Id: I587ad1abe390843d4a9e74431b6fc4b63f8ba512 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
* dediprog: Separate shutdown from failed init cleanupAnastasia Klimchuk2021-06-301-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Shutdown function was covering two different jobs here: 1) the actual shutdown which is run at the end of the driver's lifecycle and 2) cleanup in cases when initialisation failed. Now, shutdown is only doing its main job (#1), and the driver itself is doing cleanup when init fails (#2). The good thing is that now resources are released/closed immediately in cases when init fails (vs shutdown function which was run at some point later), and the driver leaves clean space after itself if init fails. And very importantly this unlocks API change which plans to move register_shutdown inside register master API, see https://review.coreboot.org/c/flashrom/+/51761 BUG=b:185191942 TEST=builds Change-Id: I3273da907614a042d50090338c337dfd64695354 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buspirate_spi: Use non-zero return value from buspirate_sendrecvAnastasia Klimchuk2021-06-301-15/+5
| | | | | | | | | | | | | | | | | | Return values for buspirate_sendrecv come from serialport_write and serialport_read, and those return 1s for any error. No need to explicity assign ret = 1, because it is already 1 for error. Follow up on commit 751afa88a7f22487069665c5d206ae490f158231 where this idea was suggested. BUG=b:185191942 TEST=builds Change-Id: I31fd70f607dc965d5cac1cd0116faa447dbc177a Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55818 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util: Name udev-rules file accordinglyFelix Singer2021-06-281-0/+0
| | | | | | | | | | | Rename `z60_flashrom.rules` to `flashrom_udev.rules`. Change-Id: I1e7918d3121d89d3c388745e433a3a413eac0e21 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55866 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Turn x86-arch comments into `if`Nico Huber2021-06-271-2/+4
| | | | | | | | | | | Actually check what the comments suggest. Supposed to fix non-x86 on NetBSD and OpenBSD. Change-Id: I440919c12e54ca4371e21bc8d1b5ab64692fb4b8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52486 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* layout: Tidy up forward declarationsNico Huber2021-06-261-7/+7
| | | | | | | | | | | | | | | | * Parameter names like `flashctx` for a `struct flashrom_flashctx` don't add any value. * `const` qualification of parameters is meaningless in forward declarations. Arguments are always passed by copy and an API user does not need to know what callees do with their copy. Change-Id: Iadcc1670ff86578a400dec9e804d6dda93e0fcf0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54288 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Tidy up the include-args APINico Huber2021-06-264-7/+6
| | | | | | | | | | | | Move all forward declarations into `layout.h`, use consistent naming. Change-Id: I0e87c9d91b9bc4d78f9cee98caff6985803f7be7 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54287 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Kill the global layoutNico Huber2021-06-264-27/+11
| | | | | | | | Change-Id: Ic302e9c5faf1368e5ca244ce461e55e14f916ab8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54286 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* layout: Rework normalize_romentries() APINico Huber2021-06-264-6/+5
| | | | | | | | | | | | | | Rename it to layout_sanity_checks() as that is what it does and let it work on the currently active layout instead of the global layout. Change-Id: Ifae3480d4bd68c939c291f05734544e93f00306c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54285 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libflashrom: Avoid using the global layoutNico Huber2021-06-261-3/+5
| | | | | | | | | | | | | | We used to borrow the global layout from the CLI here. Create a dynamically allocated one instead that doesn't need special treatment. Change-Id: Ic48c9e73a3d00782f638f6ff41b620910b24ab6f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54284 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libflashrom: Free `chip` instance upon flashctx teardownNico Huber2021-06-261-0/+2
| | | | | | | | | | Change-Id: I761d7e167a43e5bf08b5b3d269b0a476e3d343c5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33546 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Make `struct layout_include_args` private to `layout.c`Nico Huber2021-06-262-5/+7
| | | | | | | | | | | Change-Id: Icbfee68e85429fe41db1cad6b99f25e9f30cd672 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33545 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Drop `count` parameter of flashrom_layout_new()Nico Huber2021-06-264-6/+5
| | | | | | | | | | Change-Id: I22c180c9971068b1ae101845ce88484c6842b852 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33544 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Use linked list for `struct romentry`Nico Huber2021-06-263-71/+51
| | | | | | | | | | | | | This gets rid of the entry limit and hopefully makes future layout handling easier. We start by making `struct flashrom_layout` private to `layout.c`. Change-Id: I60a0aa1007ebcd5eb401db116f835d129b3e9732 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Pass layout directly to verify_by_layout()Nico Huber2021-06-261-11/+11
| | | | | | | | | | | | | | | It used the current layout from the flash context, before. This made it necessary to replace the pointer on-the-fly. Passing the layout directly, works without that stunt. Change-Id: Id496deec85c18bdfe968df6a798b626eb9cfbed5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33520 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Introduce get_default_layout()Nico Huber2021-06-262-2/+8
| | | | | | | | | | | | | | | Containing an included, full-flash-chip sized default region. This allows us to query the default layout specifically, also if an additional layout is attached to the flash context. Change-Id: Ia343e9775ec5bdc3fea5cdb6b347298515996e34 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33519 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Introduce flashrom_layout_new()Nico Huber2021-06-269-42/+58
| | | | | | | | | | | | | | | | | It initializes an empty layout. Currently the maximum number of entries has to be specified, which will vanish once we use dynamic allocation per entry. We replace the two special cases `single_layout` and `ich_layout` with dynamically allocated layouts. As a result, we have to take care to release the `default_layout` in a flashctx once we are done with it. Change-Id: I2ae7246493ff592e631cce924777925c7825e398 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* layout: Introduce flashrom_layout_add_region()Nico Huber2021-06-265-50/+55
| | | | | | | | | | | | | Adds a region to an existing layout, as long as there is space. Change-Id: I50d473d0d5d1fb38bd6f9ae3d7127e9ea66a94e1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33517 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Add `capacity` fieldNico Huber2021-06-265-5/+9
| | | | | | | | | | | | | | Use it to keep track of the size of the `entries` array. An interim solution until we have dynamic allocation. Change-Id: Ib5f431bc0a72a79a53fa1376c3417942b19dd3a0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33516 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Introduce layout_next()Nico Huber2021-06-263-66/+88
| | | | | | | | | | | | | | | | | | | Also, a `layout.c` internal version mutable_layout_next() that allows to modify layout entries and a shorthand to look up an entry by name, _layout_entry_by_name(). Use the new functions where applicable and the code is not dropped later in this train, and also to compare the layouts in flashrom_layout_read_from_ifd() in depth. Change-Id: I284958471c61344d29d92c95d88475065a9ca9aa Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33542 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* hwaccess_x86_io_unittest: Add dummy iopl to avoid including sys/io.hAnastasia Klimchuk2021-06-261-1/+11
| | | | | | | | | | | | | | | | | | | | | sys/io.h is platform specific, and also in tests environment we don't need real functions anyway. Adding dummy implementation of iopl is sufficient for tests. The rest of io is not needed because hwaccess_x86_io_unittest.h re-defines macros OUTB/INB/etc and those macros evaluate to test-only functions. This is a follow up on commit 21e22ba8a7750f1cfe5cd3323e3137695ffef0a4 which introduced hwaccess_x86_io_unittest.h BUG=b:181803212 TEST=builds and ninja test on x86 (same as before) Change-Id: I3f2f0408be7c00f954b899031b52b2b97ef19ca3 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Do not run a test if its driver is not builtAnastasia Klimchuk2021-06-251-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For all tests that exist as of today, drivers are built by default, however config options can be disabled and in that case test should not be run. Technically, this is done by skipping the test. BUG=b:181803212 TEST=1) Tested by adding into tests/meson.build -DCONFIG_xxx=0 4 times (for every driver with test), and then running ninja test Result: corresponding test is skipped, all other tests are passed 2) Running ninja test with default config settings (everything is enabled, no overriding in test meson). Result: all tests are passed. 3) Replacing one of config options in the patch with CONFIG_JLINK_SPI which is disabled by default. Result: corresponding test is skipped. Change-Id: Ic1c48e41f658045a608f46636071f478ba646f77 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Revise error messageNico Huber2021-06-251-2/+1
| | | | | | | | | | | | | Reword the message and drop the error string from libftdi. It is already printed in send_buf(). Change-Id: I125ae9ec0d5487fc26d588a7fd6c54da4ebd0d70 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Normalize error paths in ft2232_shutdown()Nico Huber2021-06-251-5/+7
| | | | | | | | | | | | | | We missed to `free(spi_data)` on one path. It also seems odd to leak the return code of a locally used library into our common infrastruc- ture, so normalize all error paths to return 1. Change-Id: I5158d06127a9a8934b083e48b69d29c4d5a11831 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55696 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Revise comments about output pin statesNico Huber2021-06-251-9/+21
| | | | | | | | | | | | | | | | | | | | The meaning of the variables is easy to misunderstand as some states are merely implicit: All output pins that are not set in the `cs_bits` mask will be constantly driven low. This may be sheer coincidence as all programmers that need additional pins driven use active-low signals to enable buffers. While other pins stay low, *all* pins set in the `cs_bits` mask are supposed to be toggled during SPI transactions. Also drop some irritating dead code and try to explain things in a comment. Change-Id: I2b84ede01759c80f69d5ad17e43783d09ecd1107 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55695 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi: Enhance csgpiol parameter for FT2232"Nico Huber2021-06-251-26/+14
| | | | | | | | | | | | | | | | This reverts commit ba6575de82f091b97ea0f2efcf2f79ef3739d64f. Technically, the only thing that is wrong here is the lack of docu- mentation (manpage update). However, as this change was succeeded by a regressing fixup patch, it seems likely that the meaning of the `csgpiol` parameter was just misunderstood and these changes were not what the author intended. Change-Id: I460237b9d275b1cd1d8a069f852d17dea393b14e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi: Fix broken GPIOL cs_bits state (#126)"Nico Huber2021-06-251-1/+1
| | | | | | | | | | | | | | | | | This reverts commit a43e44b6abbe8381be3f3dd20a430973cf8b8ab5. Nothing was broken. So this breaks everything. Well, actually only the `csgpiol` parameter. But that is very obvious. `csgpiol` was added to use a GPIO pin as /CS. But this change impli- citly hardcoded /CS to ADBUS3. Change-Id: I9ecdfe227585dda74658c16c96a57dd42d1d78b4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55693 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Revert "ft2232_spi.c: Generalize GPIOL pin control"Nico Huber2021-06-251-43/+1
| | | | | | | | | | | | | | This reverts commit 3207844ec0b5dc16f9ae9ee45294213dbf6d060b. It used the `cs_bits` variable for its own purpose (not CS) which was only possible because the `cs_bits` semantics were broken earlier. It also lacks an update to the manpage. Change-Id: I4a95317b1cf1fc6df9471d0cfb8a6a8f40964fe3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55692 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Revert "ft2232_spi.c: Rename cs_bits to pinlvl"Nico Huber2021-06-251-14/+14
| | | | | | | | | | | | | | | This reverts commit 180079632b15758ca0bbbe5782611bd4573e11d8. The renaming only seemed to match the code because of earlier introduced regressions (see following reverts). For proper support of the `gpiol` feature, we'd likely need both a `cs_bits` and a `pinlvl` variable. Change-Id: Ifa5b2259ccf49ddf729d01176bacd94a95c39925 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55691 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Drop ft2232_spi_send_command()Nico Huber2021-06-251-90/+1
| | | | | | | | | | | Now that ft2232_spi_send_multicommand() is implemented, we don't need the single-command version anymore. Change-Id: I2e7fa1046e260f490b881a33e02ad73d16f0a30c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi: Don't lower write data chunksizeNico Huber2021-06-251-4/+0
| | | | | | | | | | | | | | | This "chunk size" limits the amount of data that is passed to libusb at once. If we had exceeded the chunk size, libftdi would have split the data into individual, synchronous bulk transfers. But the chunk size was actually chosen to avoid this. So without any known effect, setting the chunk size is useless. Drop it. Change-Id: I779e24dc3f3379a98ddce02c3765062ac3241884 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ft2232_spi.c: Implement spi_send_multicommand()Simon Buhrow2021-06-251-1/+90
| | | | | | | | | | | | | | | | | | Every ftdi_write_data() call is quite time consuming as the ftdi-chips seems to take always 2-3ms to respond. This leads to what the comment already says: Minimize USB transfers by packing as many commands as possible together. So I packed the WREN command together with the following operation which can be program or erase operation. This saves about 1 minute when programming a 128MBit Flash within a virtualized setup. Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Change-Id: Ie4a07499ec5ef0af23818593f45dc427285a9e8a Reviewed-on: https://review.coreboot.org/c/flashrom/+/40477 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Move test environment header files into tests directoryAnastasia Klimchuk2021-06-222-0/+0
| | | | | | | | | | | | | | | | | | | | | Both of these headers are only used in test builds, so they should live in tests/ directory. No changes to meson.build and tests/meson.build files are needed because tests/meson.build adds current directory to search for include files. BUG=b:181803212 TEST=ninja test -> all tests pass nm builddir/tests/flashrom_unit_tests.p/.._it85spi.c.o -> has symbols _test_calloc, _test_free, test_inb, test_outb nm builddir/flashrom.p/it85spi.c.o -> has symbols calloc free inb outb Change-Id: Ia42773b98b1eb6c65241aa559c0c8b4926bd0814 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* buspirate: Add psus optionJeremy Kerr2021-06-212-1/+31
| | | | | | | | | | | | This change adds a 'psus=<on|off>' option, to control the external Vcc state of the bus pirate, allowing hardware where the SPI flash chip is powered by the 3V3/5V lines directly. Change-Id: I8a7d4b40c0f7f04f6976f6757f05b61f2c9958f9 Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add support for Macronix MX66L1G45GPatrick Rudolph2021-06-202-0/+50
| | | | | | | | | | Tested on Dediprog SF600: Reading and writing works. Change-Id: I554e828c97d9ec77b08489573a34e176599d2518 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buspirate_spi.c: Drop bp_ prefix for spi data struct membersAnastasia Klimchuk2021-06-201-13/+13
| | | | | | | | | | | | | | | The name of the struct type already contains bp_ prefix, so prefix doesn't need to be repeated in members name. BUG=b:185191942 TEST=builds Change-Id: Ia463e3f58497e4b10be072bdd29244f4868098e7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* buspirate_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-06-201-19/+42
| | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: I418bbfff15fb126b042fbc9be09dbf59f4d243b8 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52958 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* buspirate_spi.c: Separate shutdown from failed init cleanupAnastasia Klimchuk2021-06-201-49/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Shutdown function was covering two different jobs here: 1) the actual shutdown which is run at the end of the driver's lifecycle and 2) cleanup in cases when initialisation failed. Now, shutdown is only doing its main job (#1), and the driver itself is doing cleanup when init fails (#2). The good thing is that now resources are released/closed immediately in cases when init fails (vs shutdown function which was run at some point later), and the driver leaves clean space after itself if init fails. And very importantly this unlocks API change which plans to move register_shutdown inside register master API, see https://review.coreboot.org/c/flashrom/+/51761 BUG=b:185191942 TEST=builds Change-Id: I04d57e2552d23a1a4a906c68539f0ccefc13e8a0 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52877 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-24 04:19:31 +0000