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author | Aimylios <20016942+aimylios@users.noreply.github.com> | 2020-04-19 14:20:37 +0200 |
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committer | tgingold <tgingold@users.noreply.github.com> | 2020-04-19 16:08:35 +0200 |
commit | 8bb8453af7acd34705a449cac9cd8427d6db43ba (patch) | |
tree | 9243aaa5ec9c4f91abd7291af432dbba41772815 /examples/icestick/leds/rotate2.vhdl | |
parent | d941c8f65bbbb90f97c17e26b5610624c2198b10 (diff) | |
download | ghdl-yosys-plugin-8bb8453af7acd34705a449cac9cd8427d6db43ba.tar.gz ghdl-yosys-plugin-8bb8453af7acd34705a449cac9cd8427d6db43ba.tar.bz2 ghdl-yosys-plugin-8bb8453af7acd34705a449cac9cd8427d6db43ba.zip |
Improve examples for Lattice iCEstick
- move "leds" examples to subdirectory
- add Makefile
- add *.json files to .gitignore
- adjust README.md and fix some typos
Diffstat (limited to 'examples/icestick/leds/rotate2.vhdl')
-rw-r--r-- | examples/icestick/leds/rotate2.vhdl | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/examples/icestick/leds/rotate2.vhdl b/examples/icestick/leds/rotate2.vhdl new file mode 100644 index 0000000..e51ec6c --- /dev/null +++ b/examples/icestick/leds/rotate2.vhdl @@ -0,0 +1,35 @@ +architecture rotate2 of leds is + signal clk_4hz: std_logic; +begin + process (clk) + -- 3_000_000 is 0x2dc6c0 + variable counter : unsigned (23 downto 0); + begin + if rising_edge(clk) then + if counter = 2_999_999 then + counter := x"000000"; + clk_4hz <= '1'; + else + counter := counter + 1; + clk_4hz <= '0'; + end if; + end if; + end process; + + process (clk) + variable count : unsigned (1 downto 0); + begin + if rising_edge(clk) and clk_4hz = '1' then + count := count + 1; + if count = 0 then + (led1, led2, led3, led4, led5) <= unsigned'("10001"); + elsif count = 1 then + (led1, led2, led3, led4, led5) <= unsigned'("01000"); + elsif count = 2 then + (led1, led2, led3, led4, led5) <= unsigned'("00101"); + else + (led1, led2, led3, led4, led5) <= unsigned'("00010"); + end if; + end if; + end process; +end rotate2; |