diff options
| -rwxr-xr-x | testsuite/ghdl-issues/issue999/testsuite.sh | 1 | ||||
| -rw-r--r-- | testsuite/issues/issue65/latch3.vhdl | 20 | ||||
| -rwxr-xr-x | testsuite/issues/issue65/testsuite.sh | 9 | ||||
| -rwxr-xr-x | testsuite/issues/issue68/testsuite.sh | 1 |
4 files changed, 31 insertions, 0 deletions
diff --git a/testsuite/ghdl-issues/issue999/testsuite.sh b/testsuite/ghdl-issues/issue999/testsuite.sh index 981976c..136ceed 100755 --- a/testsuite/ghdl-issues/issue999/testsuite.sh +++ b/testsuite/ghdl-issues/issue999/testsuite.sh @@ -6,3 +6,4 @@ topdir=../.. synth_import --std=08 test.vhdl -e clean +echo OK diff --git a/testsuite/issues/issue65/latch3.vhdl b/testsuite/issues/issue65/latch3.vhdl new file mode 100644 index 0000000..e4518fe --- /dev/null +++ b/testsuite/issues/issue65/latch3.vhdl @@ -0,0 +1,20 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity latch is + port ( + signal clk : in std_logic; + signal data : in std_logic + ); +end entity; + + + +architecture rtl of latch is + signal other : std_logic := '0'; +begin + + default clock is rising_edge(clk); + assert always {true} + |=> next (data = other); +end architecture; diff --git a/testsuite/issues/issue65/testsuite.sh b/testsuite/issues/issue65/testsuite.sh new file mode 100755 index 0000000..65eb2b6 --- /dev/null +++ b/testsuite/issues/issue65/testsuite.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +topdir=../.. +. $topdir/testenv.sh + +synth_import --std=08 latch3.vhdl -e + +clean +echo OK diff --git a/testsuite/issues/issue68/testsuite.sh b/testsuite/issues/issue68/testsuite.sh index 7c3a75a..916c10a 100755 --- a/testsuite/issues/issue68/testsuite.sh +++ b/testsuite/issues/issue68/testsuite.sh @@ -6,3 +6,4 @@ topdir=../.. synth_ice40 "demux.vhdl -e" clean +echo OK |