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author | Tristan Gingold <tgingold@free.fr> | 2020-03-13 05:32:40 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-03-13 06:30:32 +0100 |
commit | 138516ead7cf495551b7056cc31cc06ed655be8e (patch) | |
tree | 22337c28a592719d8827ad5d7c600761e5067421 | |
parent | 3d8e30a1a95738a8078db2fcc5051ca7b3ef0b22 (diff) | |
download | ghdl-138516ead7cf495551b7056cc31cc06ed655be8e.tar.gz ghdl-138516ead7cf495551b7056cc31cc06ed655be8e.tar.bz2 ghdl-138516ead7cf495551b7056cc31cc06ed655be8e.zip |
testsuite/synth: add tests for previous commit.
-rw-r--r-- | testsuite/synth/iassoc01/iassoc12.vhdl | 29 | ||||
-rw-r--r-- | testsuite/synth/iassoc01/tb_iassoc12.vhdl | 29 | ||||
-rwxr-xr-x | testsuite/synth/iassoc01/testsuite.sh | 2 |
3 files changed, 59 insertions, 1 deletions
diff --git a/testsuite/synth/iassoc01/iassoc12.vhdl b/testsuite/synth/iassoc01/iassoc12.vhdl new file mode 100644 index 000000000..f7b7f54a0 --- /dev/null +++ b/testsuite/synth/iassoc01/iassoc12.vhdl @@ -0,0 +1,29 @@ +use work.pkg.all; + +entity riassoc12 is + port (v : natural; + res : out nat_rec); +end riassoc12; + +architecture behav of riassoc12 is +begin + res.a <= v + 1; + res.b <= v + 2; +end behav; + +entity iassoc12 is + port (v : natural; + a, b : out natural); +end iassoc12; + +use work.pkg.all; + +architecture behav of iassoc12 is + component riassoc12 is + port (v : natural; + res : out nat_rec); + end component; +begin + inst : riassoc12 + port map (v => v, res.a => a, res.b => b); +end behav; diff --git a/testsuite/synth/iassoc01/tb_iassoc12.vhdl b/testsuite/synth/iassoc01/tb_iassoc12.vhdl new file mode 100644 index 000000000..f7f5241d0 --- /dev/null +++ b/testsuite/synth/iassoc01/tb_iassoc12.vhdl @@ -0,0 +1,29 @@ +entity tb_iassoc12 is +end tb_iassoc12; + +library ieee; +use ieee.std_logic_1164.all; + +architecture behav of tb_iassoc12 is + signal a : natural; + signal b : natural; + signal v : natural; +begin + dut: entity work.iassoc12 + port map (v, a, b); + + process + begin + v <= 5; + wait for 1 ns; + assert a = 6 severity failure; + assert b = 7 severity failure; + + v <= 203; + wait for 1 ns; + assert a = 204 severity failure; + assert b = 205 severity failure; + + wait; + end process; +end behav; diff --git a/testsuite/synth/iassoc01/testsuite.sh b/testsuite/synth/iassoc01/testsuite.sh index d00af5014..7e01dc72a 100755 --- a/testsuite/synth/iassoc01/testsuite.sh +++ b/testsuite/synth/iassoc01/testsuite.sh @@ -2,7 +2,7 @@ . ../../testenv.sh -for t in iassoc01 iassoc02 iassoc03 iassoc04 iassoc11; do +for t in iassoc01 iassoc02 iassoc03 iassoc04 iassoc11 iassoc12; do analyze pkg.vhdl $t.vhdl tb_$t.vhdl elab_simulate tb_$t clean |