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author | Tristan Gingold <tgingold@free.fr> | 2020-05-02 15:38:51 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-05-04 19:04:05 +0200 |
commit | 2a60624876cef4505bd05af8ac18276d37fffdf4 (patch) | |
tree | 074a66b84919b37d726a2b8e3adedc280a9758e0 /src/synth/netlists-disp_vhdl.adb | |
parent | 84b548ddb8dd089f7953bbda0fa8db424f02ef09 (diff) | |
download | ghdl-2a60624876cef4505bd05af8ac18276d37fffdf4.tar.gz ghdl-2a60624876cef4505bd05af8ac18276d37fffdf4.tar.bz2 ghdl-2a60624876cef4505bd05af8ac18276d37fffdf4.zip |
synth: preliminary support of sequential assertions. For #1273
Diffstat (limited to 'src/synth/netlists-disp_vhdl.adb')
-rw-r--r-- | src/synth/netlists-disp_vhdl.adb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb index 6faf3337f..a4644d4f6 100644 --- a/src/synth/netlists-disp_vhdl.adb +++ b/src/synth/netlists-disp_vhdl.adb @@ -1248,7 +1248,7 @@ package body Netlists.Disp_Vhdl is Put_Line (";"); when Id_Assert => Disp_Template - (" \l0: assert \i0 = '1' severity error;" & NL, Inst); + (" \l0: postponed assert \i0 = '1' severity error;" & NL, Inst); when Id_Assume => Disp_Template (" \l0: assert \i0 = '1' severity warning; -- assume" & NL, |