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| author | Tristan Gingold <tgingold@free.fr> | 2023-01-03 13:53:37 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-01-03 16:47:28 +0100 |
| commit | 1e5f96642bbf470934f245c98908337f75abb35a (patch) | |
| tree | 32c6a26b31a4e27e7306ac7c9faa7159d65010a9 /src/synth/synth-vhdl_insts.adb | |
| parent | d7ffe048ed623283655a11ffc5e75d6e5731f738 (diff) | |
| download | ghdl-1e5f96642bbf470934f245c98908337f75abb35a.tar.gz ghdl-1e5f96642bbf470934f245c98908337f75abb35a.tar.bz2 ghdl-1e5f96642bbf470934f245c98908337f75abb35a.zip | |
synth: introduce type_array_unbounded
Diffstat (limited to 'src/synth/synth-vhdl_insts.adb')
| -rw-r--r-- | src/synth/synth-vhdl_insts.adb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/synth/synth-vhdl_insts.adb b/src/synth/synth-vhdl_insts.adb index dbecfe0ab..46f2983a2 100644 --- a/src/synth/synth-vhdl_insts.adb +++ b/src/synth/synth-vhdl_insts.adb @@ -382,6 +382,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => return 1; when Type_Record @@ -425,6 +426,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => Idx := Idx + 1; Descs (Idx) := (Name => Port_Sname, @@ -904,6 +906,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => if N /= No_Net then Connect (Get_Input (Inst, Port), N); @@ -942,6 +945,7 @@ package body Synth.Vhdl_Insts is | Type_Vector | Type_Unbounded_Vector | Type_Array + | Type_Array_Unbounded | Type_Unbounded_Array => N := Get_Output (Inst, Idx); Idx := Idx + 1; |