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| author | Tristan Gingold <tgingold@free.fr> | 2019-09-21 16:36:34 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2019-09-21 16:36:34 +0200 |
| commit | 06d92830364fe1115d32a120d6e531cc498eb5b2 (patch) | |
| tree | 57395c020a43ce49ecd6e9133c4ae2710665d592 /src/synth | |
| parent | 96ee9c9e4cd8b984d6785b06cfdd4cddcd771537 (diff) | |
| download | ghdl-06d92830364fe1115d32a120d6e531cc498eb5b2.tar.gz ghdl-06d92830364fe1115d32a120d6e531cc498eb5b2.tar.bz2 ghdl-06d92830364fe1115d32a120d6e531cc498eb5b2.zip | |
synth: fix to_unsigned (nat, nat)
Diffstat (limited to 'src/synth')
| -rw-r--r-- | src/synth/synth-oper.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/synth/synth-oper.adb b/src/synth/synth-oper.adb index 7baa45841..d50ca1862 100644 --- a/src/synth/synth-oper.adb +++ b/src/synth/synth-oper.adb @@ -921,7 +921,8 @@ package body Synth.Oper is Arg_Net := Get_Net (Arg); return Create_Value_Net (Synth_Uresize (Arg_Net, Uns32 (Size.Scal), Expr), - Create_Res_Bound (Arg, Arg_Net)); + Create_Vec_Type_By_Length (Uns32 (Size.Scal), + Logic_Type)); end if; end if; end; |