synth-vhdl_eval: handle to_X01 for bit to std_ulogic.

Fix #2307

2 files changed, 12 insertions, 0 deletions

diff --git a/src/synth/synth-ieee-std_logic_1164.ads b/src/synth/synth-ieee-std_logic_1164.ads
index 20ebe4be1..a81947c54 100644
--- a/src/synth/synth-ieee-std_logic_1164.ads
+++ b/src/synth/synth-ieee-std_logic_1164.ads
@@ -55,6 +55,9 @@ package Synth.Ieee.Std_Logic_1164 is
 
    function To_Bit (S : Std_Ulogic; Xmap : Bit) return Bit;
 
+   type Table_Bit_Log_Type is array (Bit) of Std_Ulogic;
+   Bit2log_Table : Table_Bit_Log_Type := ('0', '1');
+
    type Table_1d is array (Std_Ulogic) of Std_Ulogic;
    type Table_2d is array (Std_Ulogic, Std_Ulogic) of Std_Ulogic;
 
diff --git a/src/synth/synth-vhdl_eval.adb b/src/synth/synth-vhdl_eval.adb
index 126c8a735..d9b1bc2a8 100644
--- a/src/synth/synth-vhdl_eval.adb
+++ b/src/synth/synth-vhdl_eval.adb
@@ -2756,6 +2756,15 @@ package body Synth.Vhdl_Eval is
                B := Map_X01Z (B);
                return Create_Memory_U8 (Std_Ulogic'Pos (B), Res_Typ);
             end;
+         when Iir_Predefined_Ieee_1164_To_X01_Bit_Log =>
+            declare
+               B : Bit;
+               S : Std_Ulogic;
+            begin
+               B := Read_Bit (Param1.Mem, 0);
+               S := Bit2log_Table (B);
+               return Create_Memory_U8 (Std_Ulogic'Pos (S), Res_Typ);
+            end;
          when Iir_Predefined_Ieee_1164_To_X01_Slv
             | Iir_Predefined_Ieee_Numeric_Std_To_X01_Uns
             | Iir_Predefined_Ieee_Numeric_Std_To_X01_Sgn =>