diff options
| author | Tristan Gingold <tgingold@free.fr> | 2016-02-13 18:17:21 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2016-02-14 13:52:34 +0100 |
| commit | 03a502169b3a3656018236ec4d4952a3fd4ec880 (patch) | |
| tree | 1784c7c25db963dce7ac2340c740a428a4ab8ced /src/vhdl/simulate/execution.adb | |
| parent | 32d422d2f5d002354aeaf111ce484b6665a5c9d5 (diff) | |
| download | ghdl-03a502169b3a3656018236ec4d4952a3fd4ec880.tar.gz ghdl-03a502169b3a3656018236ec4d4952a3fd4ec880.tar.bz2 ghdl-03a502169b3a3656018236ec4d4952a3fd4ec880.zip | |
simul: more fixes for std_ulogic.
Diffstat (limited to 'src/vhdl/simulate/execution.adb')
| -rw-r--r-- | src/vhdl/simulate/execution.adb | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/src/vhdl/simulate/execution.adb b/src/vhdl/simulate/execution.adb index 9c6da7731..78b5e8310 100644 --- a/src/vhdl/simulate/execution.adb +++ b/src/vhdl/simulate/execution.adb @@ -1364,7 +1364,7 @@ package body Execution is begin for I in Right.Val_Array.V'Range loop Format (Positive (I)) := - Character'Val (Right.Val_Array.V (I).E32); + Character'Val (Right.Val_Array.V (I).E8); end loop; Format (Format'Last) := ASCII.NUL; Grt.Vstrings.To_String @@ -1399,27 +1399,27 @@ package body Execution is declare use Grt.Std_Logic_1164; begin - Result := Create_E32_Value + Result := Create_E8_Value (Std_Ulogic'Pos - (Match_Eq_Table (Std_Ulogic'Val (Left.E32), - Std_Ulogic'Val (Right.E32)))); + (Match_Eq_Table (Std_Ulogic'Val (Left.E8), + Std_Ulogic'Val (Right.E8)))); end; when Iir_Predefined_Std_Ulogic_Match_Inequality => Eval_Right; declare use Grt.Std_Logic_1164; begin - Result := Create_E32_Value + Result := Create_E8_Value (Std_Ulogic'Pos - (Not_Table (Match_Eq_Table (Std_Ulogic'Val (Left.E32), - Std_Ulogic'Val (Right.E32))))); + (Not_Table (Match_Eq_Table (Std_Ulogic'Val (Left.E8), + Std_Ulogic'Val (Right.E8))))); end; when Iir_Predefined_Std_Ulogic_Match_Ordering_Functions => Eval_Right; declare use Grt.Std_Logic_1164; - L : constant Std_Ulogic := Std_Ulogic'Val (Left.E32); - R : constant Std_Ulogic := Std_Ulogic'Val (Right.E32); + L : constant Std_Ulogic := Std_Ulogic'Val (Left.E8); + R : constant Std_Ulogic := Std_Ulogic'Val (Right.E8); Res : Std_Ulogic; begin Check_Std_Ulogic_Dc (Expr, L); @@ -1437,7 +1437,7 @@ package body Execution is when Iir_Predefined_Std_Ulogic_Match_Greater_Equal => Res := Not_Table (Match_Lt_Table (L, R)); end case; - Result := Create_E32_Value (Std_Ulogic'Pos (Res)); + Result := Create_E8_Value (Std_Ulogic'Pos (Res)); end; when Iir_Predefined_Std_Ulogic_Array_Match_Equality @@ -1452,11 +1452,10 @@ package body Execution is Le, Re : Std_Ulogic; Has_Match_Err : Boolean; begin - Result := Create_E32_Value (Std_Ulogic'Pos ('1')); Has_Match_Err := False; for I in Left.Val_Array.V'Range loop - Le := Std_Ulogic'Val (Left.Val_Array.V (I).E32); - Re := Std_Ulogic'Val (Right.Val_Array.V (I).E32); + Le := Std_Ulogic'Val (Left.Val_Array.V (I).E8); + Re := Std_Ulogic'Val (Right.Val_Array.V (I).E8); if (Le = '-' or Re = '-') and then not Has_Match_Err then Assert_Std_Ulogic_Dc (Expr); Has_Match_Err := True; @@ -1466,7 +1465,7 @@ package body Execution is if Func = Iir_Predefined_Std_Ulogic_Array_Match_Inequality then Res := Not_Table (Res); end if; - Result := Create_E32_Value (Std_Ulogic'Pos (Res)); + Result := Create_E8_Value (Std_Ulogic'Pos (Res)); end; when others => |