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author | Tristan Gingold <tgingold@free.fr> | 2019-12-30 20:07:35 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-12-30 20:07:35 +0100 |
commit | 10b0ac263ed7c59c438c1cb82faef51370cbd67e (patch) | |
tree | 0430b5e1ae8c137057832f2946d16f9d5222588a /src/vhdl/vhdl-nodes.adb | |
parent | 6340fddff21567b10dd774d5459536d37c6239dc (diff) | |
download | ghdl-10b0ac263ed7c59c438c1cb82faef51370cbd67e.tar.gz ghdl-10b0ac263ed7c59c438c1cb82faef51370cbd67e.tar.bz2 ghdl-10b0ac263ed7c59c438c1cb82faef51370cbd67e.zip |
ams-vhdl: add simultaneous null statement.
Diffstat (limited to 'src/vhdl/vhdl-nodes.adb')
-rw-r--r-- | src/vhdl/vhdl-nodes.adb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 7d62b2104..84b94196d 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1136,7 +1136,9 @@ package body Vhdl.Nodes is | Iir_Kind_Psl_Default_Clock | Iir_Kind_Generate_Statement_Body | Iir_Kind_If_Generate_Else_Clause + | Iir_Kind_Simultaneous_Null_Statement | Iir_Kind_Simultaneous_Procedural_Statement + | Iir_Kind_Simultaneous_Case_Statement | Iir_Kind_Simultaneous_If_Statement | Iir_Kind_Simultaneous_Elsif | Iir_Kind_Simple_Signal_Assignment_Statement |