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authorTristan Gingold <tgingold@free.fr>2019-10-21 21:07:51 +0200
committerTristan Gingold <tgingold@free.fr>2019-10-21 21:07:51 +0200
commita08e8ce832701dd0832330e783009b20b34f6782 (patch)
treea3edf90ede2b760f3bb41f40a5cc3a4c380119ad /src
parent046d2373b2f9c9501e1ef4cd563a6d34667bca26 (diff)
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vhdl-sem_decls: add comment.
Diffstat (limited to 'src')
-rw-r--r--src/vhdl/vhdl-sem_decls.adb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-sem_decls.adb b/src/vhdl/vhdl-sem_decls.adb
index 0f173d923..0f6cb17e7 100644
--- a/src/vhdl/vhdl-sem_decls.adb
+++ b/src/vhdl/vhdl-sem_decls.adb
@@ -2057,6 +2057,9 @@ package body Vhdl.Sem_Decls is
-- If IS_GLOBAL is set, then declarations may be seen outside of unit.
-- This must be set for entities and packages (except when
-- Flags.Flag_Whole_Analyze is set).
+ -- This controls whether a type is used for a signal.
+ -- When Flag_Whole_Analyze is false, we are conservative and assume
+ -- that any global type is used for a signal (when allowed).
Is_Global : Boolean;
begin
case Get_Kind (Parent) is