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author | Tristan Gingold <tgingold@free.fr> | 2018-11-10 16:11:47 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2018-11-10 16:11:47 +0100 |
commit | 56e74b28fe2df92739000347ce013a627dbd7ccd (patch) | |
tree | 80262953c46cb1416fa62ed22f32214c0f206e4e /testsuite/gna/issue691/tb.vhdl | |
parent | f2da5e23513a67e282a60ac5df689eb9dbe65938 (diff) | |
download | ghdl-56e74b28fe2df92739000347ce013a627dbd7ccd.tar.gz ghdl-56e74b28fe2df92739000347ce013a627dbd7ccd.tar.bz2 ghdl-56e74b28fe2df92739000347ce013a627dbd7ccd.zip |
Add testcase for #691
Diffstat (limited to 'testsuite/gna/issue691/tb.vhdl')
-rw-r--r-- | testsuite/gna/issue691/tb.vhdl | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/testsuite/gna/issue691/tb.vhdl b/testsuite/gna/issue691/tb.vhdl new file mode 100644 index 000000000..5cf0ed33e --- /dev/null +++ b/testsuite/gna/issue691/tb.vhdl @@ -0,0 +1,12 @@ +library ieee, std; +use ieee.std_logic_1164.all; + +entity e1 is port(number: in std_logic_vector(15 downto 0)); end e1; + +library ieee; +use ieee.std_logic_1164.all; + +entity tb is end entity; +architecture arch of tb is begin + DS: entity work.e1 port map (number => std_logic_vector(1, 15)); +end arch; |