testsuite/gna: add reproducer for #1404

4 files changed, 65 insertions, 0 deletions

diff --git a/testsuite/gna/issue1404/pkg.vhdl b/testsuite/gna/issue1404/pkg.vhdl
new file mode 100644
index 000000000..265c52482
--- /dev/null
+++ b/testsuite/gna/issue1404/pkg.vhdl
@@ -0,0 +1,21 @@
+package mylib_pkg is
+
+  pure function ceil_log2(constant v : natural) return natural;
+
+end package mylib_pkg;
+
+package body mylib_pkg is
+
+  pure function ceil_log2(constant v : natural) return natural is
+    variable res : natural;
+  begin
+    res := 31;
+    for i in 30 downto 0 loop
+      if (2**i >= v) then
+        res := i;
+      end if;
+    end loop;
+    return res;
+  end function ceil_log2;
+
+end package body mylib_pkg;
diff --git a/testsuite/gna/issue1404/tb.vhdl b/testsuite/gna/issue1404/tb.vhdl
new file mode 100644
index 000000000..bf410f4e9
--- /dev/null
+++ b/testsuite/gna/issue1404/tb.vhdl
@@ -0,0 +1,19 @@
+use work.types_pkg.all;
+
+entity design_tb is
+end entity;
+
+architecture testbench of design_tb is
+  constant PERIOD : time := 10 ns;
+
+  signal clk   : bit := '1';
+
+  type pass_through_t is record
+    texture_id         : mytype_t;
+  end record;
+
+  signal input_pass_through       : pass_through_t;
+
+begin
+  clk <= '0' after 1 ns, '1' after 2 ns;
+end architecture;
diff --git a/testsuite/gna/issue1404/testsuite.sh b/testsuite/gna/issue1404/testsuite.sh
new file mode 100755
index 000000000..ee0d0f7d5
--- /dev/null
+++ b/testsuite/gna/issue1404/testsuite.sh
@@ -0,0 +1,17 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze pkg.vhdl
+analyze types_pkg.vhdl
+analyze tb.vhdl
+elab design_tb
+
+if ghdl_has_feature design_tb ghw; then
+  simulate design_tb --wave=tb.ghw
+  rm -f tb.ghw
+fi
+
+clean
+
+echo "Test successful"
diff --git a/testsuite/gna/issue1404/types_pkg.vhdl b/testsuite/gna/issue1404/types_pkg.vhdl
new file mode 100644
index 000000000..dc3bb7288
--- /dev/null
+++ b/testsuite/gna/issue1404/types_pkg.vhdl
@@ -0,0 +1,8 @@
+use work.mylib_pkg.all;
+
+package types_pkg is
+
+  constant TYPE_WIDTH : natural := CEIL_LOG2(4);
+  subtype mytype_t is bit_vector(TYPE_WIDTH - 1 downto 0);
+
+end package;