Reorganized testcases.

1 files changed, 15 insertions, 0 deletions

diff --git a/testsuite/pyunit/libghdl/examples/comments/ent_inside.vhdl b/testsuite/pyunit/libghdl/examples/comments/ent_inside.vhdl
new file mode 100644
index 000000000..834eaa999
--- /dev/null
+++ b/testsuite/pyunit/libghdl/examples/comments/ent_inside.vhdl
@@ -0,0 +1,15 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity e2 is
+  -- comments in design units (python doc-string style) :e2:
+    -- might be multi line :e2:
+    generic (
+      -- comment before a generic :frequency:
+        -- might be multiline :frequency:
+        constant FREQUENCY : positive
+    );
+    port (
+      signal Clock : in std_logic
+    );
+end entity;