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authorTristan Gingold <tgingold@free.fr>2019-11-12 20:27:22 +0100
committerTristan Gingold <tgingold@free.fr>2019-11-12 20:36:04 +0100
commit3aed7e6e47610750f50cce9bdc547f975e01e656 (patch)
treedd73f646b6e2bbff0289740eab5aaca37dcba8e7 /testsuite/synth/const01/const01.vhdl
parent72d9a475e19ab200b87975750dced5ab47994aac (diff)
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testsuite/synth: add a test for static values.
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diff --git a/testsuite/synth/const01/const01.vhdl b/testsuite/synth/const01/const01.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+
+entity const01 is
+ port (o : out std_logic_vector(0 to 31));
+end const01;
+
+architecture behav of const01 is
+ type slv_array is array (natural range <>) of std_logic_vector(7 downto 0);
+
+ function conv (v : std_logic_vector) return slv_array is
+ variable r : slv_array(0 to v'length / 8 - 1);
+ begin
+ for i in 0 to r'length-1 loop
+ r (i) := v(v'length - (i*8) - 1 downto v'length - (i*8) - 8);
+ end loop;
+ return r;
+ end conv;
+
+ constant init : std_logic_vector (31 downto 0) := x"01020304";
+ constant res : slv_array (0 to 3) := conv (init);
+begin
+ o (0 to 7) <= res (0);
+ o (8 to 15) <= res (1);
+ o (16 to 23) <= res (2);
+ o (24 to 31) <= res (3);
+end behav;
+
+