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author | Tristan Gingold <tgingold@free.fr> | 2020-07-09 09:12:49 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-07-18 19:19:58 +0200 |
commit | 1850acf59aa47419c79736ab77e17918b4677faf (patch) | |
tree | f0613be836a0569503a2caea1281478e16377afb /testsuite | |
parent | 65fd76fc13044d6ea39ff757dfbbf2798758f64c (diff) | |
download | ghdl-1850acf59aa47419c79736ab77e17918b4677faf.tar.gz ghdl-1850acf59aa47419c79736ab77e17918b4677faf.tar.bz2 ghdl-1850acf59aa47419c79736ab77e17918b4677faf.zip |
testsuite/gna: add tests for subtype attribute
Diffstat (limited to 'testsuite')
-rw-r--r-- | testsuite/gna/issue641/repro3.vhdl | 28 | ||||
-rw-r--r-- | testsuite/gna/issue641/repro4.vhdl | 20 | ||||
-rwxr-xr-x | testsuite/gna/issue641/testsuite.sh | 6 |
3 files changed, 52 insertions, 2 deletions
diff --git a/testsuite/gna/issue641/repro3.vhdl b/testsuite/gna/issue641/repro3.vhdl new file mode 100644 index 000000000..ff015f83a --- /dev/null +++ b/testsuite/gna/issue641/repro3.vhdl @@ -0,0 +1,28 @@ +entity repro3b is + port (b : bit_vector); +end entity; + +architecture a of repro3b is + signal c : b'subtype; +begin + process + variable d : c'subtype; + begin + d := b; + d := (others => '0'); + assert d'left = 7; + assert d'right = 0; + wait; + end process; +end architecture; + +entity repro3 is +end entity; + +architecture tb of repro3 is + signal s : bit_vector(7 downto 0); +begin + DUT: entity work.repro3b + port map (b => s); +end architecture; + diff --git a/testsuite/gna/issue641/repro4.vhdl b/testsuite/gna/issue641/repro4.vhdl new file mode 100644 index 000000000..b1bc34c6a --- /dev/null +++ b/testsuite/gna/issue641/repro4.vhdl @@ -0,0 +1,20 @@ +entity repro4b is + port (b : bit_vector); +end entity; + +architecture a of repro4b is + signal c : b'subtype; +begin + c <= (others => '0'); +end architecture; + +entity repro4 is +end entity; + +architecture tb of repro4 is + signal s : bit_vector(7 downto 0); +begin + DUT: entity work.repro4b + port map (b => s); +end architecture; + diff --git a/testsuite/gna/issue641/testsuite.sh b/testsuite/gna/issue641/testsuite.sh index e18661f1f..88c716c6b 100755 --- a/testsuite/gna/issue641/testsuite.sh +++ b/testsuite/gna/issue641/testsuite.sh @@ -6,8 +6,10 @@ export GHDL_STD_FLAGS=--std=08 analyze ent.vhdl elab_simulate test -analyze repro1.vhdl -elab_simulate repro1 +for t in repro1 repro2 repro3 repro4; do + analyze $t.vhdl + elab_simulate $t +done clean |