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-rw-r--r--testsuite/synth/issue1591/repro4.vhdl12
1 files changed, 12 insertions, 0 deletions
diff --git a/testsuite/synth/issue1591/repro4.vhdl b/testsuite/synth/issue1591/repro4.vhdl
new file mode 100644
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--- /dev/null
+++ b/testsuite/synth/issue1591/repro4.vhdl
@@ -0,0 +1,12 @@
+entity repro4 is
+ port (o : out boolean);
+end entity repro4;
+
+architecture arch of repro4 is
+begin
+ testG : if true generate
+ signal b : boolean := true;
+ begin
+ o <= b;
+ end generate testG;
+end;