iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth: improve support of interface package. For #1460	Tristan Gingold	2020-09-13	1	-0/+4
*	synth: remove Global_Context (cleanup).	Tristan Gingold	2020-05-04	1	-3/+0
*	synth: reduce use of global context.	Tristan Gingold	2020-05-04	1	-9/+8
*	synth-context: remove unused bit0/bit1 nets.	Tristan Gingold	2020-05-02	1	-8/+0
*	synth: refactoring to store static values in wires.	Tristan Gingold	2020-04-09	1	-0/+5
*	synth: extract synth.objtypes from synth.values.	Tristan Gingold	2020-04-09	1	-0/+1
*	synth: more cleanup (and use of valtyp).	Tristan Gingold	2020-04-02	1	-1/+0
*	synth: rework - use valtyp for expressions.	Tristan Gingold	2020-04-02	1	-17/+43
*	synth: handle package instantiation. Fix #1159	Tristan Gingold	2020-03-24	1	-1/+21
*	synth: improve error handling.	Tristan Gingold	2020-03-11	1	-0/+9
*	synth: support multiple synthesis.	Tristan Gingold	2019-12-02	1	-0/+4
*	synth-context: add source_scope (for debugger).	Tristan Gingold	2019-11-23	1	-2/+8
*	synth: handle package bodies.	Tristan Gingold	2019-10-07	1	-0/+4
*	synth: renaming and minor refactoring.	Tristan Gingold	2019-09-30	1	-9/+9
*	synth: special handling of 'const' functions.	Tristan Gingold	2019-09-30	1	-0/+5
*	synth: do not create self-instance on black-boxed modules.	Tristan Gingold	2019-09-21	1	-1/+3
*	synth: add bit0/bit1 in instance.	Tristan Gingold	2019-09-21	1	-0/+6
*	synth: add Get_Build (WIP).	Tristan Gingold	2019-09-20	1	-0/+4
*	synth: add base_instance.	Tristan Gingold	2019-09-20	1	-2/+14
*	synth: rename get/set_module for instances.	Tristan Gingold	2019-09-20	1	-3/+3
*	synth-context: get rid off Set_Block_Scope.	Tristan Gingold	2019-09-20	1	-4/+1
*	synth-context: make Objects_Array private.	Tristan Gingold	2019-09-20	1	-1/+2
*	synth: refactoring to reduce global variables.	Tristan Gingold	2019-09-19	1	-4/+2
*	synth: synth_instance_type is now limited.	Tristan Gingold	2019-09-19	1	-6/+2
*	synth: make synth_instance_type private.	Tristan Gingold	2019-09-19	1	-21/+41
*	synth: improve support of return statement.	Tristan Gingold	2019-09-11	1	-2/+0
*	synth: preliminary support of dynamic indexing.	Tristan Gingold	2019-07-28	1	-1/+4
*	synth: make type Wire_Id_Record private.	Tristan Gingold	2019-07-17	1	-2/+0
*	synth: handle instantiation (WIP)	Tristan Gingold	2019-07-10	1	-0/+2
*	synth: handle simple user function calls.	Tristan Gingold	2019-07-06	1	-0/+2
*	synth: destroy iterator after for-loop.	Tristan Gingold	2019-07-01	1	-0/+3
*	vhdl: move annotations from simul to vhdl.	Tristan Gingold	2019-06-29	1	-1/+1
*	synth: get rid of execution and elaboration.	Tristan Gingold	2019-06-19	1	-10/+28
*	synth: add comments.	Tristan Gingold	2019-06-07	1	-2/+7
*	synth: add comments and refactoring.	Tristan Gingold	2019-06-07	1	-0/+21
*	vhdl: rename iirs to vhdl.nodes	Tristan Gingold	2019-05-05	1	-1/+1
*	Create the simul.ads package (for a namespace).	Tristan Gingold	2017-11-24	1	-1/+1
*	simulation: refactoring (move block_instance to iir_values).	Tristan Gingold	2017-11-24	1	-1/+1
*	Add netlist generation infrastructure.	Tristan Gingold	2017-01-31	1	-0/+50