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vhdl
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simulate
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Author
Age
Files
Lines
*
Extract grt.astdio.vhdl from grt.astdio.
Tristan Gingold
2018-12-16
2
-2
/
+3
*
files_map: renaming for consistency.
Tristan Gingold
2018-12-14
1
-2
/
+2
*
simul: adjust after previous changes.
Tristan Gingold
2018-11-15
1
-2
/
+3
*
Improve doc, fix English typo.
Tristan Gingold
2018-09-23
1
-5
/
+6
*
Add support for --time-resolution (jit only). Fix #613
Tristan Gingold
2018-08-10
1
-3
/
+1
*
simulate: remove use of Nam_Buffer.
Tristan Gingold
2018-01-20
1
-26
/
+30
*
simul: remove ports_map from instances (not used).
Tristan Gingold
2018-01-02
3
-9
/
+0
*
simul: adjust instance for conversion in calls.
Tristan Gingold
2017-12-21
1
-5
/
+5
*
simul: Add subprogram body in frames.
Tristan Gingold
2017-12-21
4
-36
/
+60
*
simul: Add ref in info to ease debugging.
Tristan Gingold
2017-12-21
2
-0
/
+26
*
simul: add Kind_Protected instead of reusing Kind_Frame.
Tristan Gingold
2017-12-21
3
-11
/
+24
*
simul: handle protected function in association conversion.
Tristan Gingold
2017-12-21
1
-18
/
+24
*
simul: handle psl endpoints (and adjust issue45).
Tristan Gingold
2017-12-21
4
-16
/
+43
*
simul: handle selected signal assignments.
Tristan Gingold
2017-12-21
2
-45
/
+69
*
simul: fix issue228.
Tristan Gingold
2017-12-21
1
-3
/
+5
*
simul: create initial driver value.
Tristan Gingold
2017-12-21
5
-38
/
+67
*
simul: minor refactoring.
Tristan Gingold
2017-12-21
1
-4
/
+2
*
simul-debugger: improve info signals.
Tristan Gingold
2017-12-21
3
-61
/
+173
*
simul-debugger: add run command.
Tristan Gingold
2017-12-20
4
-10
/
+66
*
grt: reorganize simulation loop.
Tristan Gingold
2017-12-20
1
-2
/
+21
*
simul-elaboration: handle unbounded records.
Tristan Gingold
2017-12-11
1
-1
/
+1
*
simul: handle call to a function of instantiated package.
Tristan Gingold
2017-12-11
1
-1
/
+15
*
simul: handle open association in implicit procedure
Tristan Gingold
2017-12-11
1
-3
/
+14
*
simul: fix crash while calling foreign subprogram.
Tristan Gingold
2017-12-11
1
-2
/
+2
*
simul: create_subprogram_instance: handle protected
Tristan Gingold
2017-12-11
1
-3
/
+9
*
simul: Check range of the result of concat operator.
Tristan Gingold
2017-12-11
3
-8
/
+26
*
simul: handle subtype attribute
Tristan Gingold
2017-12-11
1
-0
/
+3
*
simul: support type conversion in association.
Tristan Gingold
2017-12-11
1
-1
/
+1
*
simul: use same message format for failed assertion.
Tristan Gingold
2017-12-11
1
-14
/
+13
*
simul: emit proper error message for negative timeout.
Tristan Gingold
2017-12-11
2
-2
/
+5
*
simul: fix 'value for physical types.
Tristan Gingold
2017-12-11
1
-1
/
+1
*
simul: replace Get_Instance_For_Slot by Get_Instance_Object.
Tristan Gingold
2017-12-11
2
-22
/
+13
*
simul-debugger: add debug_upblock.
Tristan Gingold
2017-12-11
1
-0
/
+18
*
simul-execution: fix creation of subprogram frame for shared generic packages.
Tristan Gingold
2017-12-08
1
-29
/
+38
*
simul-debugger: add debug_bt (internal debugging procedure).
Tristan Gingold
2017-12-08
1
-0
/
+12
*
simul: handle optional body for package instantiation.
Tristan Gingold
2017-12-07
1
-2
/
+5
*
simul: fix annotation of macro-expanded package instantiation.
Tristan Gingold
2017-12-07
1
-5
/
+16
*
simul: handle interface type.
Tristan Gingold
2017-12-07
2
-3
/
+6
*
simul: handle generic-mapped packages.
Tristan Gingold
2017-12-07
1
-4
/
+11
*
simul: handle nested package instantiation.
Tristan Gingold
2017-12-07
2
-2
/
+5
*
simul: fix execution of actual expression.
Tristan Gingold
2017-12-06
3
-13
/
+40
*
simul: remove Current_Component (unused).
Tristan Gingold
2017-12-06
2
-11
/
+3
*
simul: fix choice list for case generate statement.
Tristan Gingold
2017-12-05
1
-2
/
+4
*
simul: fix elaboration check for package.
Tristan Gingold
2017-12-05
1
-1
/
+5
*
simul: handle unconstrained case choice.
Tristan Gingold
2017-12-05
1
-1
/
+17
*
simul: psl default clock, unaffected waveform.
Tristan Gingold
2017-12-05
3
-0
/
+8
*
simul: handle interface subprogram.
Tristan Gingold
2017-12-05
3
-11
/
+26
*
simul: handle package interface, remove iir_value_environment.
Tristan Gingold
2017-12-05
9
-80
/
+25
*
simul: handle instantiated package.
Tristan Gingold
2017-12-05
4
-11
/
+46
*
simul: add support for case generate statetement.
Tristan Gingold
2017-12-04
4
-14
/
+68
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