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path: root/src/vhdl/translate/trans-chap4.adb
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* vhdl/translate: handle vhdl-93 'last_value. Fix #1440Tristan Gingold2020-08-261-2/+4
* trans: propagate parent_type changes.Tristan Gingold2020-07-251-10/+1
* translate: improve support of unbounded records and arrays.Tristan Gingold2020-07-251-3/+6
* vhdl: improve support of subtype attribute.Tristan Gingold2020-07-181-33/+63
* vhdl/translate: add support for subtype attribute. For #641Tristan Gingold2020-06-251-7/+39
* vhdl/translate: rework object type elaboration. For #641Tristan Gingold2020-06-241-14/+26
* vhdl: minimal support of interface package in entities. For #1262Tristan Gingold2020-04-271-1/+7
* vhdl: add anonymous_signal_declaration.Tristan Gingold2019-07-031-3/+6
* vhdl: extract vhdl.errors from errorout.Tristan Gingold2019-05-081-1/+1
* vhdl: move iirs_utils to vhdl.utilsTristan Gingold2019-05-061-1/+1
* vhdl: move std_standard package to vhdl child.Tristan Gingold2019-05-051-1/+1
* vhdl: move canon to a vhdl child package.Tristan Gingold2019-05-051-2/+2
* vhdl/translate: check_composite_match: rename and handle records.Tristan Gingold2019-05-031-2/+4
* vhdl: fix uvvm failure in scoreboard testbench.Tristan Gingold2019-02-071-1/+1
* translate: handle unbounded aggregate as initial value.Tristan Gingold2018-12-161-10/+24
* translate: renaming, support constrained unbounded record aggregates.Tristan Gingold2018-12-071-1/+1
* Add --max-stack-alloc option, check stack allocation of complex object.Tristan Gingold2018-11-231-1/+45
* translate: minor refactoring.Tristan Gingold2018-11-211-3/+1
* translate: refactoring.Tristan Gingold2018-11-201-2/+1
* vhdl/translate: improve support of unbounded arrays.Tristan Gingold2018-11-091-6/+5
* Rework translation of unbounded and complex types.Tristan Gingold2018-10-211-52/+41
* translate: for alias of signal slice: trsnslate name subtype.Tristan Gingold2018-09-181-0/+26
* Release secondary stack within elab_declaration_chain. Fix #616Tristan Gingold2018-08-071-1/+4
* elab_object_init: allocate bounds for unounded aggregate if needed.Tristan Gingold2018-07-221-5/+12
* translate: handle anonymous types in formal; handle multiple conversions.Tristan Gingold2018-02-181-3/+9
* Translate; properly separates translation of types from translation of subtypes.Tristan Gingold2018-01-171-8/+30
* WIP: array translation for unbounded arrays.Tristan Gingold2018-01-141-0/+1
* Rework array/record type mode to improve support of constrained records.Tristan Gingold2018-01-111-50/+47
* Check bounds for constant intialisation.Tristan Gingold2017-11-291-1/+1
* Use Flist for records.Tristan Gingold2017-11-071-10/+7
* Use Flist for array indexes.Tristan Gingold2017-11-061-1/+1
* Rename Allocate_Fat_Array_Base to Allocate_Unbounded_Composite_Base.Tristan Gingold2017-10-281-10/+16
* translate: handle unbounded record in individual assocs.Tristan Gingold2017-10-221-3/+3
* Rename In_Conversion/Out_Conversion to Actual_Conversion/Formal_Conversion.Tristan Gingold2017-09-131-6/+6
* Handle protected function as association conversion function.Tristan Gingold2017-08-251-5/+42
* translate: renaming.Tristan Gingold2017-06-211-5/+5
* Allocate dynamic object in suspended procedures on stack2.Tristan Gingold2017-06-161-0/+7
* Adjust previous patch: handle info instantiation for interface package.Tristan Gingold2017-05-191-2/+3
* wip: rework subprogram translation.Tristan Gingold2017-05-181-16/+21
* Translation: separate subprogram translation spec and body.Tristan Gingold2017-05-181-25/+43
* translate: separate spec and body translation for implicit subprograms.Tristan Gingold2017-05-171-2/+5
* translation: renames Ortho_Func to Subprg_Node for consistency.Tristan Gingold2017-05-121-2/+2
* Create default value for ports.Tristan Gingold2017-05-091-45/+38
* Minor optimization: avoid calls to Get_Association_Formal.Tristan Gingold2017-05-081-4/+4
* vhdl08: more on unbounded records (WIP)Tristan Gingold2017-02-231-3/+3
* vhdl08: unbounded records - WIPTristan Gingold2017-02-171-4/+5
* vhdl08: unbounded records (WIP)Tristan Gingold2017-02-121-3/+2
* WIP: unbounded records (set record subtype staticness)Tristan Gingold2017-01-311-3/+2
* vhdl08: allow PSL default clock declaration in block declarative parts.Tristan Gingold2017-01-131-0/+10
* translate: rename get_array_base to get_composite_baseTristan Gingold2017-01-021-11/+11