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Author
Age
Files
Lines
*
grt: call finalizer after std.env.finish/stop. For #1347
Tristan Gingold
2020-05-31
2
-1
/
+3
*
synth: improve support of true dual port rams. For #1069
Tristan Gingold
2020-05-31
3
-7
/
+9
*
netlists-inference: minor refactoring.
Tristan Gingold
2020-05-31
1
-79
/
+64
*
netlists-inference: add comments, reorder subprograms.
Tristan Gingold
2020-05-31
1
-70
/
+63
*
synth: refine -dm debug option. Add -dm2
Tristan Gingold
2020-05-31
4
-4
/
+11
*
netlists-memories: cleanup.
Tristan Gingold
2020-05-29
2
-47
/
+4
*
netlists: rework clock handling in memories.
Tristan Gingold
2020-05-29
4
-83
/
+108
*
netlists: handle UL32 in memory initial value.
Tristan Gingold
2020-05-29
2
-4
/
+27
*
netlists-inference: factorize code.
Tristan Gingold
2020-05-29
1
-54
/
+45
*
psl-nodes: set a location on false/true/one/EOS nodes. Fix #1345
Tristan Gingold
2020-05-29
4
-18
/
+28
*
ortho/gcc: convert boolean and enums to int on interfaces.
Tristan Gingold
2020-05-28
5
-0
/
+10
*
vhdl-utils: minor style changes.
Tristan Gingold
2020-05-28
1
-4
/
+2
*
ortho: add a length parameter to start_array_aggr.
Tristan Gingold
2020-05-28
29
-236
/
+327
*
synth: handle reduction operators. Fix #1342
Tristan Gingold
2020-05-27
8
-27
/
+72
*
synth-oper: add support for conv_vector.
Tristan Gingold
2020-05-27
1
-2
/
+3
*
vhdl-scanner: makes -C part of -frelaxed
Tristan Gingold
2020-05-25
1
-1
/
+3
*
grt: implement --backtrace-severity. For #1338
Tristan Gingold
2020-05-25
4
-13
/
+50
*
ghdlsynth.h: add API for attributes. For #1318
Tristan Gingold
2020-05-23
1
-0
/
+7
*
netlists: disp attributes in vhdl output (as comments). For #1318
Tristan Gingold
2020-05-23
3
-20
/
+97
*
netlists: complete support of attributes. For #1318
Tristan Gingold
2020-05-23
5
-5
/
+102
*
grt: fix warnings from gnatgpl2020.
Tristan Gingold
2020-05-23
5
-17
/
+24
*
Rewrite dyn_interning using Dyn_Maps.
Tristan Gingold
2020-05-22
2
-140
/
+34
*
netlists: use dyn_maps package for attributes.
Tristan Gingold
2020-05-22
4
-40
/
+19
*
Add dyn_maps package
Tristan Gingold
2020-05-22
2
-0
/
+249
*
netlists: add param_pval_boolean.
Tristan Gingold
2020-05-22
3
-8
/
+12
*
netlists-memories: set location on utrunc. Fix #1332
Tristan Gingold
2020-05-21
3
-11
/
+13
*
synth: add support for ascending attribute. Fix #1333
Tristan Gingold
2020-05-21
1
-0
/
+15
*
netlists: initial support of attributes.
Tristan Gingold
2020-05-21
3
-27
/
+123
*
dyn_interning: add a Modify method.
Tristan Gingold
2020-05-21
2
-1
/
+14
*
synth-oper: fix handle of add/sub with std_logic.
Tristan Gingold
2020-05-21
1
-21
/
+21
*
netlists-disp_vhdl: fix id_sextend for 1 bit.
Tristan Gingold
2020-05-21
1
-1
/
+1
*
synth: handle more operators from std_logic_arith. Fix synth121
Tristan Gingold
2020-05-21
1
-13
/
+19
*
netlists-inference: Fix sequential assertions at init. Fix #1330
Tristan Gingold
2020-05-21
1
-12
/
+17
*
vhdl-nodes: use a flag field for direction.
Tristan Gingold
2020-05-20
4
-5
/
+15
*
ghwlib: fix non-initialized field for ghw_disp_hie.
Tristan Gingold
2020-05-20
1
-0
/
+1
*
ghwlib: never display the NO_SIG terminator.
Tristan Gingold
2020-05-20
1
-5
/
+2
*
synth: create abstractions for Pval (from synth-insts to synth-decls)
Tristan Gingold
2020-05-20
3
-43
/
+59
*
ghwdump should handle zero-length signals (#1327)
Ben Reynwar
2020-05-20
1
-1
/
+1
*
synth-decls: handle unbounded record subtypes. Fix #1324
Tristan Gingold
2020-05-19
2
-45
/
+28
*
vhdl-nodes: Rename and move shift/rotate predefined functions. Fix #1325
Tristan Gingold
2020-05-19
4
-30
/
+27
*
netlists: initial infrastructure for attributes. For #1318
Tristan Gingold
2020-05-19
2
-7
/
+62
*
WIP: netlists: reuse free instances.
Tristan Gingold
2020-05-18
1
-37
/
+220
*
netlists: make free_instance private and remove_instance public.
Tristan Gingold
2020-05-18
1
-6
/
+4
*
netlists: improve stats.
Tristan Gingold
2020-05-18
1
-3
/
+73
*
netlits: Use Remove_Instance instead of Free_Instance.
Tristan Gingold
2020-05-18
5
-44
/
+11
*
netlists: add disp_stats.
Tristan Gingold
2020-05-18
3
-1
/
+42
*
netlists: add more flags in Module_Record.
Tristan Gingold
2020-05-18
2
-15
/
+27
*
synth-expr: synth_subtype_conversion: add more assertions.
Tristan Gingold
2020-05-18
1
-6
/
+7
*
synth-aggr: use constrainted type to build record aggregate.
Tristan Gingold
2020-05-18
1
-1
/
+1
*
netlists-expands: remove memidx gates after expansion.
Tristan Gingold
2020-05-18
2
-13
/
+29
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