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* synth-insts.adb: avoid a crash after an error during instantiation. Fix #1734Tristan Gingold2021-04-232-1/+9
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* move ghwlib and ghwdump sources to subdir 'ghw'umarcor2021-04-233-3020/+0
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* Makefile: add and use all.ghw, install.ghw and uninstall.ghw targetsumarcor2021-04-231-10/+0
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* src: Minor clarifications in Error messages for Warning and VHDL std options.Ondrej Ille2021-04-221-4/+6
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* grt: Use GRTs sort for dump table.Ondrej Ille2021-04-221-9/+19
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* grt-avls: optimize, disable debug check after insertMartin Jeřábek2021-04-221-4/+4
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* grt: optimize wave dumpMartin Jeřábek2021-04-224-11/+49
| | | | | | | | Instead of walking through all the signals every cycle, keep an array of changed signals (without duplicates). Before dumping, sort the array. Afterwards clear it. This massively improves performance on big designs.
* synth-vhdl_oper.adb: handle resize uns/uns. For #1731Tristan Gingold2021-04-211-0/+12
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* synth-vhdl_oper.adb: adjust previous patch and testTristan Gingold2021-04-211-1/+12
| | | | | resize with two signed parameters extract the size of the second parameter to resize the first one.
* synth-vhdl_oper.adb: handle resize sgn/sgn. Fix #1731Tristan Gingold2021-04-211-0/+1
| | | | With an hint from T.Meissner
* synth: extract synth-memtype from synth-objtypesTristan Gingold2021-04-2115-124/+193
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* VHPI: improve C enum interopMarlon James2021-04-193-66/+113
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* VHPI: add tracingMarlon James2021-04-182-141/+706
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* Update license headerMarlon James2021-04-182-36/+19
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* vhdl: handle object interface using an interface type. Fix #1726Tristan Gingold2021-04-173-4/+56
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* vhdl-sem_names: avoid a crash for invalid user attribute prefix. Fix #1727Tristan Gingold2021-04-161-1/+2
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* synth: renaming (synth-heap -> synth-vhdl_heap)Tristan Gingold2021-04-165-11/+11
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* synth: renaming (synth-static_proc -> synth-vhdl_static_proc)Tristan Gingold2021-04-163-6/+6
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* synth: refactoring (synth.files_operations -> synth.vhdl_files)Tristan Gingold2021-04-166-11/+11
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* synth: renaming (synth.oper -> synth.vhdl_oper)Tristan Gingold2021-04-164-11/+11
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* synth: refactoring (synth.aggr -> synth.vhdl_aggr)Tristan Gingold2021-04-163-7/+7
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* synth: rename synth-context to synth-vhdl_contextTristan Gingold2021-04-1616-25/+25
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* vhdl: also allow type and subtype declarations in vunit. For #1724Tristan Gingold2021-04-152-0/+4
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* synth: avoid crash in case of non-elaboratable generic.Tristan Gingold2021-04-152-4/+10
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* vhdl-canon_psl: handle imp_boolTristan Gingold2021-04-151-2/+3
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* vhdl: handle constant declarations in PSL vunit. Fix #1724Tristan Gingold2021-04-152-0/+2
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* trans-chap9: handle N_Imp_Bool for PSL. For #1721Tristan Gingold2021-04-131-0/+21
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* psl: suffix implication are properties (for simple subset). For #1721Tristan Gingold2021-04-133-6/+5
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* vhdl-sem_psl.adb: can also extract clock from SERE. For #1721Tristan Gingold2021-04-131-1/+5
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* vhdl-sem_names.adb: fix check for object prefix of subtype attribute. Fix #1717Tristan Gingold2021-04-111-3/+1
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* src: Clarify error for conditional signal assignment.Ondrej Ille2021-04-111-1/+2
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* src: Allow case generate only in VHDL 2008.Ondrej Ille2021-04-111-0/+1
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* src: Unify check for VHDL at least 2008Ondrej Ille2021-04-111-47/+25
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* trans-chap9.adb: fix out of scope reference.Tristan Gingold2021-04-101-2/+3
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* ghdldrv,configure: allow LIB.UNIT name for -e/-r commands. Fix #1718Tristan Gingold2021-04-108-38/+129
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* src/grt: Avhpi - Specify enum numbers as in VHDL LRM. Add 2008 version ↵Ondrej Ille2021-04-081-5/+483
| | | | enumerations. Update "DEPRECATED" suffices.
* src: Fix PSL start count assignment for PSL endpoints.Ondrej Ille2021-04-081-9/+9
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* src: Introduce two separate PSL counters (Finish and Start).Ondrej Ille2021-04-085-19/+57
| | | | | | Finish counter corresponds to legacy count. Start counter corresponds to number of times start state is left (assertion is triggered).
* src: Adjust grt-psl to use PSL RTI type.Ondrej Ille2021-04-081-5/+5
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* src: Adjust disp-rti for new PSL RTI type.Ondrej Ille2021-04-081-12/+27
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* src: grt-utils. Fix path look-up fo PSL RTis since they now have Parent.Ondrej Ille2021-04-082-8/+7
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* src: Define PSL type RTI with simplified assertion state.Ondrej Ille2021-04-085-6/+110
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* grt: Dont build path for PSL RTIs. They dont have parents, therefore ↵Ondrej Ille2021-04-081-0/+12
| | | | Get_Path_Name crashes.
* vhdl-sem_decls.adb: handle both anonymous signal and signal attribute. Fix ↵Tristan Gingold2021-04-071-0/+2
| | | | #1715
* src: Set fcaret-diagnostics to be on by default. Clean unused Warn_Undriven.Ondrej Ille2021-04-051-4/+1
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* src: Remove obsolete FIXME, file_open_information parsed. Default ↵Ondrej Ille2021-04-051-1/+0
| | | | "IN"/"READ_MODE" behavior of file implemented.
* ghdlsynth.adb: fix a previous commitTristan Gingold2021-04-051-1/+1
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* vhdl-sem_psl.adb: handle goto/equal repeated sequence. For #1708Tristan Gingold2021-04-051-8/+20
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* vhdl-parse_psl.adb: handle parenthesis boolean prefixes. For #1708Tristan Gingold2021-04-051-29/+62
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* vhdl and libraries: add support for binding to a foreign moduleTristan Gingold2021-04-057-124/+237
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