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-rw-r--r--icebox/icebox.py192
1 files changed, 192 insertions, 0 deletions
diff --git a/icebox/icebox.py b/icebox/icebox.py
index ab83fd0..a7631a2 100644
--- a/icebox/icebox.py
+++ b/icebox/icebox.py
@@ -5786,6 +5786,198 @@ extra_cells_db = {
},
"u4k" : {
+ ("SPI", (0, 0, 0)): {
+ "MCSNO0": (0, 3, "slf_op_1"),
+ "MCSNO1": (0, 3, "slf_op_3"),
+ "MCSNO2": (0, 3, "slf_op_6"),
+ "MCSNO3": (0, 4, "slf_op_0"),
+ "MCSNOE0": (0, 3, "slf_op_2"),
+ "MCSNOE1": (0, 3, "slf_op_4"),
+ "MCSNOE2": (0, 3, "slf_op_7"),
+ "MCSNOE3": (0, 4, "slf_op_1"),
+ "MI": (0, 2, "lutff_0/in_1"),
+ "MO": (0, 2, "slf_op_5"),
+ "MOE": (0, 2, "slf_op_6"),
+ "SBACKO": (0, 2, "slf_op_0"),
+ "SBADRI0": (0, 1, "lutff_1/in_1"),
+ "SBADRI1": (0, 1, "lutff_2/in_1"),
+ "SBADRI2": (0, 2, "lutff_0/in_3"),
+ "SBADRI3": (0, 2, "lutff_1/in_3"),
+ "SBADRI4": (0, 2, "lutff_2/in_3"),
+ "SBADRI5": (0, 2, "lutff_3/in_3"),
+ "SBADRI6": (0, 2, "lutff_4/in_3"),
+ "SBADRI7": (0, 2, "lutff_5/in_3"),
+ "SBCLKI": (0, 1, "clk"),
+ "SBDATI0": (0, 1, "lutff_1/in_3"),
+ "SBDATI1": (0, 1, "lutff_2/in_3"),
+ "SBDATI2": (0, 1, "lutff_3/in_3"),
+ "SBDATI3": (0, 1, "lutff_4/in_3"),
+ "SBDATI4": (0, 1, "lutff_5/in_3"),
+ "SBDATI5": (0, 1, "lutff_6/in_3"),
+ "SBDATI6": (0, 1, "lutff_7/in_3"),
+ "SBDATI7": (0, 1, "lutff_0/in_1"),
+ "SBDATO0": (0, 1, "slf_op_0"),
+ "SBDATO1": (0, 1, "slf_op_1"),
+ "SBDATO2": (0, 1, "slf_op_2"),
+ "SBDATO3": (0, 1, "slf_op_3"),
+ "SBDATO4": (0, 1, "slf_op_4"),
+ "SBDATO5": (0, 1, "slf_op_5"),
+ "SBDATO6": (0, 1, "slf_op_6"),
+ "SBDATO7": (0, 1, "slf_op_7"),
+ "SBRWI": (0, 1, "lutff_0/in_3"),
+ "SBSTBI": (0, 2, "lutff_6/in_3"),
+ "SCKI": (0, 2, "lutff_1/in_1"),
+ "SCKO": (0, 2, "slf_op_7"),
+ "SCKOE": (0, 3, "slf_op_0"),
+ "SCSNI": (0, 2, "lutff_2/in_1"),
+ "SI": (0, 2, "lutff_7/in_3"),
+ "SO": (0, 2, "slf_op_3"),
+ "SOE": (0, 2, "slf_op_4"),
+ "SPIIRQ": (0, 2, "slf_op_1"),
+ "SPIWKUP": (0, 2, "slf_op_2"),
+ "SPI_ENABLE_0": (7, 0, "cbit2usealt_in_0"),
+ "SPI_ENABLE_1": (6, 0, "cbit2usealt_in_0"),
+ "SPI_ENABLE_2": (7, 0, "cbit2usealt_in_1"),
+ "SPI_ENABLE_3": (6, 0, "cbit2usealt_in_1"),
+ },
+ ("SPI", (25, 0, 1)): {
+ "MCSNO0": (25, 3, "slf_op_1"),
+ "MCSNO1": (25, 3, "slf_op_3"),
+ "MCSNO2": (25, 3, "slf_op_6"),
+ "MCSNO3": (25, 4, "slf_op_0"),
+ "MCSNOE0": (25, 3, "slf_op_2"),
+ "MCSNOE1": (25, 3, "slf_op_4"),
+ "MCSNOE2": (25, 3, "slf_op_7"),
+ "MCSNOE3": (25, 4, "slf_op_1"),
+ "MI": (25, 2, "lutff_0/in_1"),
+ "MO": (25, 2, "slf_op_5"),
+ "MOE": (25, 2, "slf_op_6"),
+ "SBACKO": (25, 2, "slf_op_0"),
+ "SBADRI0": (25, 1, "lutff_1/in_1"),
+ "SBADRI1": (25, 1, "lutff_2/in_1"),
+ "SBADRI2": (25, 2, "lutff_0/in_3"),
+ "SBADRI3": (25, 2, "lutff_1/in_3"),
+ "SBADRI4": (25, 2, "lutff_2/in_3"),
+ "SBADRI5": (25, 2, "lutff_3/in_3"),
+ "SBADRI6": (25, 2, "lutff_4/in_3"),
+ "SBADRI7": (25, 2, "lutff_5/in_3"),
+ "SBCLKI": (25, 1, "clk"),
+ "SBDATI0": (25, 1, "lutff_1/in_3"),
+ "SBDATI1": (25, 1, "lutff_2/in_3"),
+ "SBDATI2": (25, 1, "lutff_3/in_3"),
+ "SBDATI3": (25, 1, "lutff_4/in_3"),
+ "SBDATI4": (25, 1, "lutff_5/in_3"),
+ "SBDATI5": (25, 1, "lutff_6/in_3"),
+ "SBDATI6": (25, 1, "lutff_7/in_3"),
+ "SBDATI7": (25, 1, "lutff_0/in_1"),
+ "SBDATO0": (25, 1, "slf_op_0"),
+ "SBDATO1": (25, 1, "slf_op_1"),
+ "SBDATO2": (25, 1, "slf_op_2"),
+ "SBDATO3": (25, 1, "slf_op_3"),
+ "SBDATO4": (25, 1, "slf_op_4"),
+ "SBDATO5": (25, 1, "slf_op_5"),
+ "SBDATO6": (25, 1, "slf_op_6"),
+ "SBDATO7": (25, 1, "slf_op_7"),
+ "SBRWI": (25, 1, "lutff_0/in_3"),
+ "SBSTBI": (25, 2, "lutff_6/in_3"),
+ "SCKI": (25, 2, "lutff_1/in_1"),
+ "SCKO": (25, 2, "slf_op_7"),
+ "SCKOE": (25, 3, "slf_op_0"),
+ "SCSNI": (25, 2, "lutff_2/in_1"),
+ "SI": (25, 2, "lutff_7/in_3"),
+ "SO": (25, 2, "slf_op_3"),
+ "SOE": (25, 2, "slf_op_4"),
+ "SPIIRQ": (25, 2, "slf_op_1"),
+ "SPIWKUP": (25, 2, "slf_op_2"),
+ "SPI_ENABLE_0": (24, 0, "cbit2usealt_in_0"),
+ "SPI_ENABLE_1": (24, 0, "cbit2usealt_in_1"),
+ "SPI_ENABLE_2": (23, 0, "cbit2usealt_in_0"),
+ "SPI_ENABLE_3": (23, 0, "cbit2usealt_in_1"),
+ },
+ ("I2C", (0, 21, 0)): {
+ "I2CIRQ": (0, 20, "slf_op_7"),
+ "I2CWKUP": (0, 19, "slf_op_5"),
+ "I2C_ENABLE_0": (13, 21, "cbit2usealt_in_0"),
+ "I2C_ENABLE_1": (12, 21, "cbit2usealt_in_1"),
+ "SBACKO": (0, 20, "slf_op_6"),
+ "SBADRI0": (0, 20, "lutff_1/in_0"),
+ "SBADRI1": (0, 20, "lutff_2/in_0"),
+ "SBADRI2": (0, 20, "lutff_3/in_0"),
+ "SBADRI3": (0, 20, "lutff_4/in_0"),
+ "SBADRI4": (0, 20, "lutff_5/in_0"),
+ "SBADRI5": (0, 20, "lutff_6/in_0"),
+ "SBADRI6": (0, 20, "lutff_7/in_0"),
+ "SBADRI7": (0, 19, "lutff_2/in_0"),
+ "SBCLKI": (0, 20, "clk"),
+ "SBDATI0": (0, 19, "lutff_5/in_0"),
+ "SBDATI1": (0, 19, "lutff_6/in_0"),
+ "SBDATI2": (0, 19, "lutff_7/in_0"),
+ "SBDATI3": (0, 20, "lutff_0/in_3"),
+ "SBDATI4": (0, 20, "lutff_5/in_1"),
+ "SBDATI5": (0, 20, "lutff_6/in_1"),
+ "SBDATI6": (0, 20, "lutff_7/in_1"),
+ "SBDATI7": (0, 20, "lutff_0/in_0"),
+ "SBDATO0": (0, 19, "slf_op_6"),
+ "SBDATO1": (0, 19, "slf_op_7"),
+ "SBDATO2": (0, 20, "slf_op_0"),
+ "SBDATO3": (0, 20, "slf_op_1"),
+ "SBDATO4": (0, 20, "slf_op_2"),
+ "SBDATO5": (0, 20, "slf_op_3"),
+ "SBDATO6": (0, 20, "slf_op_4"),
+ "SBDATO7": (0, 20, "slf_op_5"),
+ "SBRWI": (0, 19, "lutff_4/in_0"),
+ "SBSTBI": (0, 19, "lutff_3/in_0"),
+ "SCLI": (0, 19, "lutff_2/in_1"),
+ "SCLO": (0, 19, "slf_op_3"),
+ "SCLOE": (0, 19, "slf_op_4"),
+ "SDAI": (0, 19, "lutff_1/in_1"),
+ "SDAO": (0, 19, "slf_op_1"),
+ "SDAOE": (0, 19, "slf_op_2"),
+ "SDA_INPUT_DELAYED": (12, 21, "SDA_input_delay"),
+ "SDA_OUTPUT_DELAYED": (12, 21, "SDA_output_delay"),
+ },
+ ("I2C", (25, 21, 0)): {
+ "I2CIRQ": (25, 20, "slf_op_7"),
+ "I2CWKUP": (25, 19, "slf_op_5"),
+ "I2C_ENABLE_0": (19, 21, "cbit2usealt_in_1"),
+ "I2C_ENABLE_1": (19, 21, "cbit2usealt_in_0"),
+ "SBACKO": (25, 20, "slf_op_6"),
+ "SBADRI0": (25, 20, "lutff_1/in_0"),
+ "SBADRI1": (25, 20, "lutff_2/in_0"),
+ "SBADRI2": (25, 20, "lutff_3/in_0"),
+ "SBADRI3": (25, 20, "lutff_4/in_0"),
+ "SBADRI4": (25, 20, "lutff_5/in_0"),
+ "SBADRI5": (25, 20, "lutff_6/in_0"),
+ "SBADRI6": (25, 20, "lutff_7/in_0"),
+ "SBADRI7": (25, 19, "lutff_2/in_0"),
+ "SBCLKI": (25, 20, "clk"),
+ "SBDATI0": (25, 19, "lutff_5/in_0"),
+ "SBDATI1": (25, 19, "lutff_6/in_0"),
+ "SBDATI2": (25, 19, "lutff_7/in_0"),
+ "SBDATI3": (25, 20, "lutff_0/in_3"),
+ "SBDATI4": (25, 20, "lutff_5/in_1"),
+ "SBDATI5": (25, 20, "lutff_6/in_1"),
+ "SBDATI6": (25, 20, "lutff_7/in_1"),
+ "SBDATI7": (25, 20, "lutff_0/in_0"),
+ "SBDATO0": (25, 19, "slf_op_6"),
+ "SBDATO1": (25, 19, "slf_op_7"),
+ "SBDATO2": (25, 20, "slf_op_0"),
+ "SBDATO3": (25, 20, "slf_op_1"),
+ "SBDATO4": (25, 20, "slf_op_2"),
+ "SBDATO5": (25, 20, "slf_op_3"),
+ "SBDATO6": (25, 20, "slf_op_4"),
+ "SBDATO7": (25, 20, "slf_op_5"),
+ "SBRWI": (25, 19, "lutff_4/in_0"),
+ "SBSTBI": (25, 19, "lutff_3/in_0"),
+ "SCLI": (25, 19, "lutff_2/in_1"),
+ "SCLO": (25, 19, "slf_op_3"),
+ "SCLOE": (25, 19, "slf_op_4"),
+ "SDAI": (25, 19, "lutff_1/in_1"),
+ "SDAO": (25, 19, "slf_op_1"),
+ "SDAOE": (25, 19, "slf_op_2"),
+ "SDA_INPUT_DELAYED": (19, 21, "SDA_input_delay"),
+ "SDA_OUTPUT_DELAYED": (19, 21, "SDA_output_delay"),
+ },
("HFOSC", (0, 21, 1)) : {
"CLKHFPU": (0, 19, "lutff_0/in_1"),
"CLKHFEN": (0, 19, "lutff_7/in_3"),