Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Seperate different DSP configs in timing data | David Shah | 2018-01-22 | 11 | -2532/+13532 |
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* | Fix 5k timing data | David Shah | 2018-01-20 | 2 | -143/+88 |
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* | I³C IO reverse engineered and documented | David Shah | 2018-01-16 | 2 | -0/+43 |
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* | Remove seperate 5k RAM DB and share with 8k instead | David Shah | 2018-01-16 | 5 | -7167/+4 |
| | | | | | This should ensure that the 5k RAM routing entries are now complete, fixing #115 | ||||
* | Figure out missing SPI config bits, and add to chipdb | David Shah | 2018-01-16 | 2 | -2/+10 |
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* | Whitespace fixes | David Shah | 2017-11-28 | 3 | -9/+36 |
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* | Add uncommitted changes and tidy up some files | David Shah | 2017-11-28 | 3 | -2/+253 |
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* | Preparations for 5k icetime | David Shah | 2017-11-24 | 3 | -2/+3627 |
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* | Documented I2C/SPI/LEDDA_IP | David Shah | 2017-11-24 | 1 | -0/+46 |
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* | All 5k IP traced | David Shah | 2017-11-24 | 4 | -3/+129 |
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* | Work on UltraPlus IP tracing | David Shah | 2017-11-24 | 3 | -0/+366 |
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* | Begin I2C/SPI IP reverse engineering | David Shah | 2017-11-23 | 4 | -0/+153 |
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* | Fix whitespace and a couple of typos | David Shah | 2017-11-20 | 5 | -5/+5 |
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* | Add missing 5k BRAM bits | David Shah | 2017-11-17 | 3 | -0/+939 |
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* | Add support for UltraPlus SPRAM | David Shah | 2017-11-17 | 2 | -237/+242 |
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* | 5k RGB driver reverse engineered | David Shah | 2017-11-17 | 3 | -0/+195 |
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* | Fix 5k corner routing, and reverse engineer SPRAM | David Shah | 2017-11-17 | 3 | -0/+406 |
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* | Figure out DSP config bits for all locs | David Shah | 2017-11-17 | 3 | -0/+142 |
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* | Trace DSP routing | David Shah | 2017-11-17 | 1 | -1/+3 |
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* | Create icefuzz scripts for DSP and 5k | David Shah | 2017-11-17 | 13 | -986/+16479 |
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* | Preparations for DSP and IpCon fuzzing | David Shah | 2017-11-08 | 8 | -5/+70 |
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* | Add more 5k RAM bits to db | David Shah | 2017-11-05 | 2 | -0/+1243 |
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* | Add 5k colbuf fuzzing scripts | David Shah | 2017-11-02 | 4 | -0/+172 |
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* | PLL configuration fuzzing script | David Shah | 2017-10-30 | 3 | -0/+316 |
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* | Share glb_netwk data between 5k and 8k parts | David Shah | 2017-10-29 | 1 | -4/+0 |
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* | Add ColBufCtrl bits to database for 5k parts | David Shah | 2017-10-25 | 1 | -0/+4 |
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* | Add some verilog tests for analysing up5k features | David Shah | 2017-10-23 | 8 | -0/+216 |
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* | Fix IeRen database for up5k | David Shah | 2017-10-23 | 3 | -0/+51 |
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* | Add DSP and IPConnect tile support to icepack and glbcheck | David Shah | 2017-10-21 | 1 | -4/+3 |
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* | Fix make_ram40 for UltraPlus | David Shah | 2017-10-20 | 1 | -3/+7 |
| | | | | | | Sometimes make_ram40 was assigning too many IO pins, causing a placment failure, and also sometimes connecting a global clock net to WCLKE or RCLKE which was also causing a placment failure. | ||||
* | Fix case where make_prim allocates all global buffer pins | David Shah | 2017-10-20 | 1 | -1/+21 |
| | | | | | | | | This is a low probability bug more likely to show up in low pin count devices with few GBINs. In rare cases make_prim would constrain all of the global buffer capable pins but not the clock input. icecube would then fail to place the clock input. This is fixed by always constraining the clock if all GBIN pins are used. | ||||
* | Quick fix of pin 23 issue (pending further discussion) | David Shah | 2017-10-20 | 1 | -1/+3 |
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* | Squelch trailing whitespace | Larry Doolittle | 2017-08-01 | 7 | -9/+6 |
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* | Fix some bugs in two of the icefuzz make_*.py scripts | Clifford Wolf | 2017-07-31 | 2 | -2/+2 |
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* | Fix icecube.sh to work with lin and lin64 dirs, remove hardcoded ICECUBEDIR= | Clifford Wolf | 2017-07-31 | 1 | -5/+5 |
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* | Remove extra IoCtrl cf_bit_ and extra_padeb_test_ lines from database | Clifford Wolf | 2017-07-31 | 1 | -0/+3 |
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* | Introduce device class into fuxx workign directories and have glbcheck ↵ | Scott Shawcroft | 2017-07-02 | 21 | -1469/+198 |
| | | | | handle unsupported 5k tiles ok. | ||||
* | More work figuring out values in icebox.py | Scott Shawcroft | 2017-06-23 | 4 | -5/+48 |
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* | Add icefuzz support for the UP5K and rework underlying device specification ↵ | Scott Shawcroft | 2017-06-22 | 19 | -128/+7444 |
| | | | | for more flexibility. | ||||
* | icefuzz support for ice40UP5k FPGA | Scott Shawcroft | 2017-06-20 | 1 | -3/+16 |
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* | Disable propagation of LP384 ieren bits into iceboxdb.py | Clifford Wolf | 2017-03-11 | 1 | -1/+8 |
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* | icefuzz data and test scripts for LP384-CM49 | hermitsoft | 2017-03-10 | 9 | -0/+245 |
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* | make_mesh.py fix for even pin-distribution | hermitsoft | 2017-03-09 | 1 | -2/+2 |
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* | Maximized icefuzz testcases for LP384-CM49 | hermitsoft | 2017-03-09 | 9 | -16/+16 |
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* | ieren and pin info for all LP384 | hermitsoft | 2017-03-09 | 3 | -1/+91 |
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* | Add icecube.sh support for lp384-cm36 and lp384-cm49, make cm49 default | Clifford Wolf | 2017-03-09 | 2 | -6/+17 |
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* | Fix icecube.sh -384 | Clifford Wolf | 2017-03-08 | 1 | -1/+1 |
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* | Remove some trailing whitespaces | Clifford Wolf | 2017-03-08 | 2 | -4/+4 |
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* | tmedges.txt added, icebox-Makefile buildable | hermitsoft | 2017-03-07 | 1 | -0/+2 |
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* | LP384 timings exported too by Makefile | hermitsoft | 2017-03-07 | 3 | -0/+297 |
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