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authorClifford Wolf <clifford@clifford.at>2018-08-08 19:35:13 +0200
committerClifford Wolf <clifford@clifford.at>2018-08-08 19:35:13 +0200
commitf6189e4677c7bdaeaa5b9b796a67d750e6c7d49d (patch)
treea13673a636ddbea3b5fd5585e3bb109b56b69435 /ecp5/arch.h
parenta3ae3f97913c291dbe36a49b1a20388156943abc (diff)
parentcd4e761bb799ca99f02d3aa177961af28a93f2d8 (diff)
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Merge branch 'master' of github.com:YosysHQ/nextpnr into constids
Diffstat (limited to 'ecp5/arch.h')
-rw-r--r--ecp5/arch.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/ecp5/arch.h b/ecp5/arch.h
index b6cc313f..3e2f203b 100644
--- a/ecp5/arch.h
+++ b/ecp5/arch.h
@@ -414,6 +414,7 @@ struct Arch : BaseCtx
std::string getChipName() const;
IdString archId() const { return id("ecp5"); }
+ ArchArgs archArgs() const { return args; }
IdString archArgsToId(ArchArgs args) const;
// -------------------------------------------------
@@ -824,10 +825,8 @@ struct Arch : BaseCtx
// Get the delay through a cell from one port to another, returning false
// if no path exists
bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
- // Get the associated clock to a port, or empty if the port is combinational
- IdString getPortClock(const CellInfo *cell, IdString port) const;
- // Return true if a port is a clock
- bool isClockPort(const CellInfo *cell, IdString port) const;
+ // Get the port class, also setting clockPort if applicable
+ TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
// Return true if a port is a net
bool isGlobalNet(const NetInfo *net) const;