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| author | myrtle <gatecat@ds0.me> | 2023-01-04 20:01:05 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-01-04 20:01:05 +0100 |
| commit | a46afc6ff8aca9a4b9275b3385bfec70f008e10b (patch) | |
| tree | a7ecff72e6dac60690fc6cd0c60b6b4314e9b707 /ecp5/constids.inc | |
| parent | f89b959b5f56ba8d91e1e7f8a645b267a5a7bb89 (diff) | |
| parent | 8d8c244e007a5f2d937c569365785ae066c4ce5f (diff) | |
| download | nextpnr-a46afc6ff8aca9a4b9275b3385bfec70f008e10b.tar.gz nextpnr-a46afc6ff8aca9a4b9275b3385bfec70f008e10b.tar.bz2 nextpnr-a46afc6ff8aca9a4b9275b3385bfec70f008e10b.zip | |
Merge pull request #1076 from adamgreig/ecp5-dsp-remap
ECP5: Add DSP signal remapping
Diffstat (limited to 'ecp5/constids.inc')
| -rw-r--r-- | ecp5/constids.inc | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/ecp5/constids.inc b/ecp5/constids.inc index c161f94f..6445b098 100644 --- a/ecp5/constids.inc +++ b/ecp5/constids.inc @@ -1769,6 +1769,8 @@ X(REGMODE_A) X(REGMODE_B) X(REGSET) X(REG_FLAG_CLK) +X(REG_FLAG_CE) +X(REG_FLAG_RST) X(REG_INPUTA_CE) X(REG_INPUTA_CLK) X(REG_INPUTA_RST) @@ -1776,8 +1778,17 @@ X(REG_INPUTB_CE) X(REG_INPUTB_CLK) X(REG_INPUTB_RST) X(REG_INPUTC0_CLK) +X(REG_INPUTC0_CE) +X(REG_INPUTC0_RST) X(REG_INPUTC1_CLK) +X(REG_INPUTC1_CE) +X(REG_INPUTC1_RST) X(REG_INPUTC_CLK) +X(REG_INPUTC_CE) +X(REG_INPUTC_RST) +X(REG_INPUTCFB_CLK) +X(REG_INPUTCFB_CE) +X(REG_INPUTCFB_RST) X(REG_OPCODEIN_0_CE) X(REG_OPCODEIN_0_CLK) X(REG_OPCODEIN_0_RST) @@ -1793,12 +1804,18 @@ X(REG_OPCODEOP0_1_RST) X(REG_OPCODEOP1_0_CLK) X(REG_OPCODEOP1_1_CLK) X(REG_OUTPUT0_CLK) +X(REG_OUTPUT0_CE) +X(REG_OUTPUT0_RST) X(REG_OUTPUT1_CLK) +X(REG_OUTPUT1_CE) +X(REG_OUTPUT1_RST) X(REG_OUTPUT_CLK) +X(REG_OUTPUT_CE) X(REG_OUTPUT_RST) X(REG_PIPELINE_CE) X(REG_PIPELINE_CLK) X(REG_PIPELINE_RST) +X(HIGHSPEED_CLK) X(RESETMODE) X(RNDPAT) X(RSTAMUX) |