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authorDavid Shah <dave@ds0.me>2020-04-07 20:02:29 +0100
committerGitHub <noreply@github.com>2020-04-07 20:02:29 +0100
commit396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf (patch)
tree2886c786853565c048274fd13b0d1b55c6510c14 /ecp5/pack.cc
parente8933f8519768447874167dcb62a6cd2b24a0225 (diff)
parent3aecb3b08c20c3dc5055bce035bd2667705ea5b2 (diff)
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Merge pull request #423 from rschlaikjer/rschlaikjer-regmode-timing-database
Add support for REGMODE to DP16KD
Diffstat (limited to 'ecp5/pack.cc')
-rw-r--r--ecp5/pack.cc23
1 files changed, 23 insertions, 0 deletions
diff --git a/ecp5/pack.cc b/ecp5/pack.cc
index 9c3bb617..0872ae58 100644
--- a/ecp5/pack.cc
+++ b/ecp5/pack.cc
@@ -3014,6 +3014,29 @@ void Arch::assignArchInfo()
ci->sliceInfo.has_l6mux = true;
} else if (ci->type == id_DP16KD) {
ci->ramInfo.is_pdp = (int_or_default(ci->params, id("DATA_WIDTH_A"), 0) == 36);
+
+ // Output register mode (REGMODE_{A,B}). Valid options are 'NOREG' and 'OUTREG'.
+ std::string regmode_a = str_or_default(ci->params, id("REGMODE_A"), "NOREG");
+ if (regmode_a != "NOREG" && regmode_a != "OUTREG")
+ log_error("DP16KD %s has invalid REGMODE_A configuration '%s'\n", ci->name.c_str(this),
+ regmode_a.c_str());
+ std::string regmode_b = str_or_default(ci->params, id("REGMODE_B"), "NOREG");
+ if (regmode_b != "NOREG" && regmode_b != "OUTREG")
+ log_error("DP16KD %s has invalid REGMODE_B configuration '%s'\n", ci->name.c_str(this),
+ regmode_b.c_str());
+ ci->ramInfo.is_output_a_registered = regmode_a == "OUTREG";
+ ci->ramInfo.is_output_b_registered = regmode_b == "OUTREG";
+
+ // Based on the REGMODE, we have different timing lookup tables.
+ if (!ci->ramInfo.is_output_a_registered && !ci->ramInfo.is_output_b_registered) {
+ ci->ramInfo.regmode_timing_id = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG;
+ } else if (!ci->ramInfo.is_output_a_registered && ci->ramInfo.is_output_b_registered) {
+ ci->ramInfo.regmode_timing_id = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_OUTREG;
+ } else if (ci->ramInfo.is_output_a_registered && !ci->ramInfo.is_output_b_registered) {
+ ci->ramInfo.regmode_timing_id = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_NOREG;
+ } else if (ci->ramInfo.is_output_a_registered && ci->ramInfo.is_output_b_registered) {
+ ci->ramInfo.regmode_timing_id = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_OUTREG;
+ }
}
}
for (auto net : sorted(nets)) {