ecp5: remove debug and clangformat

Signed-off-by: David Shah <dave@ds0.me>

3 files changed, 13 insertions, 10 deletions

diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc
index c5eca14f..00486e39 100644
--- a/ecp5/bitstream.cc
+++ b/ecp5/bitstream.cc
@@ -91,7 +91,6 @@ static void tie_cib_signal(Context *ctx, ChipConfig &cc, WireId wire, bool value
         NPNR_ASSERT(signals.size() < 100);
         cibsig = signals.front();
         basename = ctx->getWireBasename(cibsig).str(ctx);
-        log_info("%s\n", basename.c_str());
         signals.pop();
         if (std::regex_match(basename, cib_re))
             break;
@@ -467,7 +466,9 @@ void tieoff_dcu_ports(Context *ctx, ChipConfig &cc, CellInfo *ci)
 {
     for (auto port : ci->ports) {
         if (port.second.net == nullptr && port.second.type == PORT_IN) {
-            if (port.first.str(ctx).find("CLK") != std::string::npos || port.first.str(ctx).find("HDIN") != std::string::npos || port.first.str(ctx).find("HDOUT") != std::string::npos)
+            if (port.first.str(ctx).find("CLK") != std::string::npos ||
+                port.first.str(ctx).find("HDIN") != std::string::npos ||
+                port.first.str(ctx).find("HDOUT") != std::string::npos)
                 continue;
             bool value = bool_or_default(ci->params, ctx->id(port.first.str(ctx) + "MUX"), false);
             tie_cib_signal(ctx, cc, ctx->getBelPinWire(ci->bel, port.first), value);
@@ -475,7 +476,6 @@ void tieoff_dcu_ports(Context *ctx, ChipConfig &cc, CellInfo *ci)
     }
 }
 
-
 static void set_pip(Context *ctx, ChipConfig &cc, PipId pip)
 {
     std::string tile = ctx->getPipTilename(pip);
@@ -484,7 +484,8 @@ static void set_pip(Context *ctx, ChipConfig &cc, PipId pip)
     cc.tiles[tile].add_arc(sink, source);
 }
 
-static std::vector<bool> parse_config_str(std::string str, int length) {
+static std::vector<bool> parse_config_str(std::string str, int length)
+{
     // For DCU config which might be bin, hex or dec using prefices accordingly
     std::string base = str.substr(0, 2);
     std::vector<bool> word;
diff --git a/ecp5/globals.cc b/ecp5/globals.cc
index f2a556fa..75535dfe 100644
--- a/ecp5/globals.cc
+++ b/ecp5/globals.cc
@@ -302,7 +302,8 @@ class Ecp5GlobalRouter
     }
 
     // Return true if a short (<5) route exists between two wires
-    bool has_short_route(WireId src, WireId dst, int thresh = 5) {
+    bool has_short_route(WireId src, WireId dst, int thresh = 5)
+    {
         std::queue<WireId> visit;
         std::unordered_map<WireId, PipId> backtrace;
         visit.push(src);
@@ -310,7 +311,8 @@ class Ecp5GlobalRouter
         while (true) {
 
             if (visit.empty() || visit.size() > 1000) {
-                log_info ("dist %s -> %s = inf\n", ctx->getWireName(src).c_str(ctx), ctx->getWireName(dst).c_str(ctx));
+                // log_info ("dist %s -> %s = inf\n", ctx->getWireName(src).c_str(ctx),
+                // ctx->getWireName(dst).c_str(ctx));
                 return false;
             }
             cursor = visit.front();
@@ -334,7 +336,8 @@ class Ecp5GlobalRouter
             cursor = ctx->getPipSrcWire(fnd->second);
             length++;
         }
-        log_info ("dist %s -> %s = %d\n", ctx->getWireName(src).c_str(ctx), ctx->getWireName(dst).c_str(ctx), length);
+        // log_info ("dist %s -> %s = %d\n", ctx->getWireName(src).c_str(ctx), ctx->getWireName(dst).c_str(ctx),
+        // length);
         return length < thresh;
     }
 
@@ -360,8 +363,6 @@ class Ecp5GlobalRouter
         ctx->bindBel(best_bel, dcc, STRENGTH_LOCKED);
     }
 
-
-
     // Insert a DCC into a net to promote it to a global
     NetInfo *insert_dcc(NetInfo *net)
     {
diff --git a/ecp5/pack.cc b/ecp5/pack.cc
index 4f1c7f79..ae416a7b 100644
--- a/ecp5/pack.cc
+++ b/ecp5/pack.cc
@@ -1034,7 +1034,8 @@ class Ecp5Packer
     }
 
     // "Pack" DCUs
-    void pack_dcus() {
+    void pack_dcus()
+    {
         for (auto cell : sorted(ctx->cells)) {
             CellInfo *ci = cell.second;
             if (ci->type == id_DCUA) {