Arch API: New specification for timing port classes

Signed-off-by: David Shah <davey1576@gmail.com>

2 files changed, 6 insertions, 7 deletions

diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index de3abd44..12707a03 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -495,9 +495,10 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort
     return false;
 }
 
-IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return IdString(); }
-
-bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; }
+TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
+{
+    return TMG_IGNORE;
+}
 
 bool Arch::isIOCell(const CellInfo *cell) const { return cell->type == id("TRELLIS_IO"); }
 
diff --git a/ecp5/arch.h b/ecp5/arch.h
index fd8d0a13..7bbb9da5 100644
--- a/ecp5/arch.h
+++ b/ecp5/arch.h
@@ -827,10 +827,8 @@ struct Arch : BaseCtx
     // Get the delay through a cell from one port to another, returning false
     // if no path exists
     bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
-    // Get the associated clock to a port, or empty if the port is combinational
-    IdString getPortClock(const CellInfo *cell, IdString port) const;
-    // Return true if a port is a clock
-    bool isClockPort(const CellInfo *cell, IdString port) const;
+    // Get the port class, also setting clockPort if applicable
+    TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
     // Return true if a port is a net
     bool isGlobalNet(const NetInfo *net) const;
     // Return true if a cell is an IO