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| author | David Shah <dave@ds0.me> | 2020-04-09 21:36:27 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2020-04-09 21:36:27 +0100 |
| commit | ced336492ce3b157cabf265edc5cb79abca4bdf1 (patch) | |
| tree | 137ab05917a50e7b88734def32f76bd072afa529 /ecp5 | |
| parent | 396dfb7d5ee4d1a559e50ac79fe4e5f2aaeaccbf (diff) | |
| download | nextpnr-ced336492ce3b157cabf265edc5cb79abca4bdf1.tar.gz nextpnr-ced336492ce3b157cabf265edc5cb79abca4bdf1.tar.bz2 nextpnr-ced336492ce3b157cabf265edc5cb79abca4bdf1.zip | |
ecp5: Make hysteresis default-on for LVCMOS33 bidir as well as input
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'ecp5')
| -rw-r--r-- | ecp5/bitstream.cc | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc index 54d0c0a4..d46bbe33 100644 --- a/ecp5/bitstream.cc +++ b/ecp5/bitstream.cc @@ -890,9 +890,10 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string cib_wirename = ctx->locInfo(cib_wire)->wire_data[cib_wire.index].name.get(); cc.tiles[cib_tile].add_enum("CIB." + cib_wirename + "MUX", "0"); } - if (dir == "INPUT" && !is_differential(ioType_from_str(iotype)) && + if ((dir == "INPUT" || dir == "BIDIR") && !is_differential(ioType_from_str(iotype)) && !is_referenced(ioType_from_str(iotype))) { - cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", "ON"); + cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", + str_or_default(ci->attrs, ctx->id("HYSTERESIS"), "ON")); } if (ci->attrs.count(ctx->id("SLEWRATE")) && !is_referenced(ioType_from_str(iotype))) cc.tiles[pio_tile].add_enum(pio + ".SLEWRATE", str_or_default(ci->attrs, ctx->id("SLEWRATE"), "SLOW")); @@ -931,9 +932,8 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex iovoltage_to_str(vccio).c_str(), ci->name.c_str(ctx)); } } - if (ci->attrs.count(ctx->id("OPENDRAIN"))) - cc.tiles[pio_tile].add_enum(pio + ".OPENDRAIN", - str_or_default(ci->attrs, ctx->id("OPENDRAIN"), "OFF")); + if (ci->attrs.count(ctx->id("OPENDRAIN"))) + cc.tiles[pio_tile].add_enum(pio + ".OPENDRAIN", str_or_default(ci->attrs, ctx->id("OPENDRAIN"), "OFF")); std::string datamux_oddr = str_or_default(ci->params, ctx->id("DATAMUX_ODDR"), "PADDO"); if (datamux_oddr != "PADDO") cc.tiles[pic_tile].add_enum(pio + ".DATAMUX_ODDR", datamux_oddr); @@ -1257,13 +1257,11 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex tg.config.add_enum("FEEDBK_PATH", str_or_default(ci->params, ctx->id("FEEDBK_PATH"), "CLKOP")); tg.config.add_enum("CLKOP_TRIM_POL", str_or_default(ci->params, ctx->id("CLKOP_TRIM_POL"), "RISING")); - tg.config.add_enum("CLKOP_TRIM_DELAY", - intstr_or_default(ci->params, ctx->id("CLKOP_TRIM_DELAY"), "0")); + tg.config.add_enum("CLKOP_TRIM_DELAY", intstr_or_default(ci->params, ctx->id("CLKOP_TRIM_DELAY"), "0")); tg.config.add_enum("CLKOS_TRIM_POL", str_or_default(ci->params, ctx->id("CLKOS_TRIM_POL"), "RISING")); - tg.config.add_enum("CLKOS_TRIM_DELAY", - intstr_or_default(ci->params, ctx->id("CLKOS_TRIM_DELAY"), "0")); + tg.config.add_enum("CLKOS_TRIM_DELAY", intstr_or_default(ci->params, ctx->id("CLKOS_TRIM_DELAY"), "0")); tg.config.add_enum("OUTDIVIDER_MUXA", str_or_default(ci->params, ctx->id("OUTDIVIDER_MUXA"), get_net_or_empty(ci, id_CLKOP) ? "DIVA" : "REFCLK")); |