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authorPepijn de Vos <pepijndevos@gmail.com>2022-06-16 11:38:23 +0200
committerPepijn de Vos <pepijndevos@gmail.com>2022-06-16 11:38:23 +0200
commitb7992ec7724000f813ab053ac6042326f3795471 (patch)
tree6244976d70a4069e079f85823d9882636bc08e98 /gowin
parentde1bee9352c9f760cb21a35912c48ed2f830c023 (diff)
downloadnextpnr-b7992ec7724000f813ab053ac6042326f3795471.tar.gz
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hook up CE maybe
Diffstat (limited to 'gowin')
-rw-r--r--gowin/arch.cc2
-rw-r--r--gowin/cells.cc1
-rw-r--r--gowin/pack.cc1
3 files changed, 4 insertions, 0 deletions
diff --git a/gowin/arch.cc b/gowin/arch.cc
index cba492ab..65f15204 100644
--- a/gowin/arch.cc
+++ b/gowin/arch.cc
@@ -1094,6 +1094,8 @@ Arch::Arch(ArchArgs args) : args(args)
addBelInput(belname, id_CLK, id(buf));
snprintf(buf, 32, "R%dC%d_LSR%d", row + 1, col + 1, 2);
addBelInput(belname, id_LSR, id(buf));
+ snprintf(buf, 32, "R%dC%d_CE%d", row + 1, col + 1, 2);
+ addBelInput(belname, id_CE, id(buf));
break;
// fall through the ++
case ID_LUT7:
diff --git a/gowin/cells.cc b/gowin/cells.cc
index 63ee71ed..0dc0ce06 100644
--- a/gowin/cells.cc
+++ b/gowin/cells.cc
@@ -54,6 +54,7 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::
new_cell->addInput(names[i]);
}
new_cell->addInput(id_CLK);
+ new_cell->addInput(id_CE);
new_cell->addInput(id_LSR);
} else if (type == id_GW_MUX2_LUT5 || type == id_GW_MUX2_LUT6 || type == id_GW_MUX2_LUT7 ||
type == id_GW_MUX2_LUT7 || type == id_GW_MUX2_LUT8) {
diff --git a/gowin/pack.cc b/gowin/pack.cc
index 7d3a8e98..0ba71705 100644
--- a/gowin/pack.cc
+++ b/gowin/pack.cc
@@ -708,6 +708,7 @@ void pack_sram(Context *ctx)
std::unique_ptr<CellInfo> ramw_slice =
create_generic_cell(ctx, id_RAMW, ci->name.str(ctx) + "$RAMW_SLICE");
sram_to_ramw_split(ctx, ci, ramw_slice.get());
+ ramw_slice->connectPort(id_CE, ctx->nets[ctx->id("$PACKER_VCC_NET")].get());
// Create actual RAM slices
std::unique_ptr<CellInfo> ram_comb[4];